@@ -39,6 +39,14 @@ enum sof_fw_state {
SOF_FW_CRASHED,
};
+/* DSP power states */
+enum sof_dsp_power_states {
+ SOF_DSP_PM_D0,
+ SOF_DSP_PM_D1,
+ SOF_DSP_PM_D2,
+ SOF_DSP_PM_D3,
+};
+
/*
* SOF Platform data.
*/
@@ -79,14 +79,6 @@ bool sof_debug_check_flag(int mask);
/* max number of DSP cores */
#define SOF_MAX_DSP_NUM_CORES 8
-/* DSP power state */
-enum sof_dsp_power_states {
- SOF_DSP_PM_D0,
- SOF_DSP_PM_D1,
- SOF_DSP_PM_D2,
- SOF_DSP_PM_D3,
-};
-
struct sof_dsp_power_state {
u32 state;
u32 substate; /* platform-specific */