| Message ID | 1444032393-13433-5-git-send-email-gabriel.fernandez@linaro.org |
|---|---|
| State | Accepted |
| Commit | 848dd6a87a10bd24b5a4c8b84eaba3cdd0ec7a19 |
| Headers | show
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[82.127.83.212]) by smtp.gmail.com with ESMTPSA id nf15sm13252498wic.22.2015.10.05.01.07.45 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 05 Oct 2015 01:07:46 -0700 (PDT) From: Gabriel Fernandez <gabriel.fernandez@linaro.org> To: Maxime Coquelin <maxime.coquelin@st.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@codeaurora.org>, Gabriel Fernandez <gabriel.fernandez@linaro.org> Cc: Peter Griffin <peter.griffin@linaro.org>, Pankaj Dev <pankaj.dev@st.com>, Olivier Bideau <olivier.bideau@st.com>, Geert Uytterhoeven <geert+renesas@glider.be>, Fabian Frederick <fabf@skynet.be>, Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>, Mark Rutland <mark.rutland@arm.com>, Ian Campbell <ijc+devicetree@hellion.org.uk>, Kumar Gala <galak@codeaurora.org>, Srinivas Kandagatla <srinivas.kandagatla@gmail.com>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@stlinux.com, linux-clk@vger.kernel.org Subject: [PATCH v3 4/4] ARM: STi: DT: Add support for stih418 A9 pll Date: Mon, 5 Oct 2015 10:06:33 +0200 Message-Id: <1444032393-13433-5-git-send-email-gabriel.fernandez@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1444032393-13433-1-git-send-email-gabriel.fernandez@linaro.org> References: <1444032393-13433-1-git-send-email-gabriel.fernandez@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: <patchwork-forward.linaro.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. 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diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi index 148e177..ae6d997 100644 --- a/arch/arm/boot/dts/stih418-clock.dtsi +++ b/arch/arm/boot/dts/stih418-clock.dtsi @@ -44,7 +44,7 @@ clockgen_a9_pll: clockgen-a9-pll { #clock-cells = <1>; - compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32"; + compatible = "st,stih418-plls-c28-a9", "st,clkgen-plls-c32"; clocks = <&clk_sysin>;
Add support for new PLL-type for stih418 A9-PLL. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> --- arch/arm/boot/dts/stih418-clock.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)