diff mbox series

[14/16] ASoC: codecs: wcd938x: fix tlv min max range

Message ID 20220222115933.9114-15-srinivas.kandagatla@linaro.org
State New
Headers show
Series ASoC: codecs: qcom fix validation failures | expand

Commit Message

Srinivas Kandagatla Feb. 22, 2022, 11:59 a.m. UTC 
on Qualcomm codecs gain tlv control specifies min max range as both
negative to positive numbers like

SOC_SINGLE_S8_TLV("... Volume", ..,  -84, 40, gain)

However with recent boundary checks added in commit 817f7c9335ec0
("ASoC: ops: Reject out of bounds values in snd_soc_put_volsw())
setting a value above 40 gain will fail.

So fix this min max range correctly to
SOC_SINGLE_S8_TLV("... Volume", ..,  0, 124, gain)
so that users can now set gain correctly

Fixes: 1cde8b822332 ("ASoC: wcd934x: add basic controls")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 sound/soc/codecs/wcd934x.c | 62 +++++++++++++++++++-------------------
 1 file changed, 31 insertions(+), 31 deletions(-)
diff mbox series

Patch

diff --git a/sound/soc/codecs/wcd934x.c b/sound/soc/codecs/wcd934x.c
index ab580f37cf00..5e45d5eec7c2 100644
--- a/sound/soc/codecs/wcd934x.c
+++ b/sound/soc/codecs/wcd934x.c
@@ -3996,83 +3996,83 @@  static const struct snd_kcontrol_new wcd934x_snd_controls[] = {
 	SOC_SINGLE_TLV("ADC4 Volume", WCD934X_ANA_AMIC4, 0, 20, 0, analog_gain),
 
 	SOC_SINGLE_S8_TLV("RX0 Digital Volume", WCD934X_CDC_RX0_RX_VOL_CTL,
-			  -84, 40, digital_gain), /* -84dB min - 40dB max */
+			  0, 124, digital_gain), /* -84dB min - 40dB max */
 	SOC_SINGLE_S8_TLV("RX1 Digital Volume", WCD934X_CDC_RX1_RX_VOL_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("RX2 Digital Volume", WCD934X_CDC_RX2_RX_VOL_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("RX3 Digital Volume", WCD934X_CDC_RX3_RX_VOL_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("RX4 Digital Volume", WCD934X_CDC_RX4_RX_VOL_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("RX7 Digital Volume", WCD934X_CDC_RX7_RX_VOL_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("RX8 Digital Volume", WCD934X_CDC_RX8_RX_VOL_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("RX0 Mix Digital Volume",
 			  WCD934X_CDC_RX0_RX_VOL_MIX_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("RX1 Mix Digital Volume",
 			  WCD934X_CDC_RX1_RX_VOL_MIX_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("RX2 Mix Digital Volume",
 			  WCD934X_CDC_RX2_RX_VOL_MIX_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("RX3 Mix Digital Volume",
 			  WCD934X_CDC_RX3_RX_VOL_MIX_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("RX4 Mix Digital Volume",
 			  WCD934X_CDC_RX4_RX_VOL_MIX_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("RX7 Mix Digital Volume",
 			  WCD934X_CDC_RX7_RX_VOL_MIX_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("RX8 Mix Digital Volume",
 			  WCD934X_CDC_RX8_RX_VOL_MIX_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 
 	SOC_SINGLE_S8_TLV("DEC0 Volume", WCD934X_CDC_TX0_TX_VOL_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("DEC1 Volume", WCD934X_CDC_TX1_TX_VOL_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("DEC2 Volume", WCD934X_CDC_TX2_TX_VOL_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("DEC3 Volume", WCD934X_CDC_TX3_TX_VOL_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("DEC4 Volume", WCD934X_CDC_TX4_TX_VOL_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("DEC5 Volume", WCD934X_CDC_TX5_TX_VOL_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("DEC6 Volume", WCD934X_CDC_TX6_TX_VOL_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("DEC7 Volume", WCD934X_CDC_TX7_TX_VOL_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 	SOC_SINGLE_S8_TLV("DEC8 Volume", WCD934X_CDC_TX8_TX_VOL_CTL,
-			  -84, 40, digital_gain),
+			  0, 124, digital_gain),
 
 	SOC_SINGLE_S8_TLV("IIR0 INP0 Volume",
-			  WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B1_CTL, -84, 40,
+			  WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B1_CTL, 0, 124,
 			  digital_gain),
 	SOC_SINGLE_S8_TLV("IIR0 INP1 Volume",
-			  WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B2_CTL, -84, 40,
+			  WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B2_CTL, 0, 124,
 			  digital_gain),
 	SOC_SINGLE_S8_TLV("IIR0 INP2 Volume",
-			  WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B3_CTL, -84, 40,
+			  WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B3_CTL, 0, 124,
 			  digital_gain),
 	SOC_SINGLE_S8_TLV("IIR0 INP3 Volume",
-			  WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B4_CTL, -84, 40,
+			  WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B4_CTL, 0, 124,
 			  digital_gain),
 	SOC_SINGLE_S8_TLV("IIR1 INP0 Volume",
-			  WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B1_CTL, -84, 40,
+			  WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B1_CTL, 0, 124,
 			  digital_gain),
 	SOC_SINGLE_S8_TLV("IIR1 INP1 Volume",
-			  WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B2_CTL, -84, 40,
+			  WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B2_CTL, 0, 124,
 			  digital_gain),
 	SOC_SINGLE_S8_TLV("IIR1 INP2 Volume",
-			  WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B3_CTL, -84, 40,
+			  WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B3_CTL, 0, 124,
 			  digital_gain),
 	SOC_SINGLE_S8_TLV("IIR1 INP3 Volume",
-			  WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B4_CTL, -84, 40,
+			  WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B4_CTL, 0, 124,
 			  digital_gain),
 
 	SOC_ENUM("TX0 HPF cut off", cf_dec0_enum),