diff mbox

[3/7] Optimize ZEXT_EXPR with tree-vrp

Message ID 5619CFE6.40403@linaro.org
State New
Headers show

Commit Message

Kugan Vivekanandarajah Oct. 11, 2015, 2:56 a.m. UTC
On 09/10/15 21:29, Richard Biener wrote:
> +      unsigned int prec = tree_to_uhwi (vr1.min);
> 
> this should use unsigned HOST_WIDE_INT
> 
> +      wide_int sign_bit = wi::shwi (1ULL << (prec - 1),
> +                                   TYPE_PRECISION (TREE_TYPE (vr0.min)));
> 
> use wi::one (TYPE_PRECISION (TREE_TYPE (vr0.min))) << (prec - 1);
> 
> That is, you really need to handle precisions bigger than HOST_WIDE_INT.
> 
> But I suppose wide_int really misses a test_bit function (it has a set_bit
> one already).
> 
> +         if (wi::bit_and (must_be_nonzero, sign_bit) == sign_bit)
> +           {
> +             /* If to-be-extended sign bit is one.  */
> +             tmin = type_min;
> +             tmax = may_be_nonzero;
> 
> I think tmax should be zero-extended may_be_nonzero from prec.
> 
> +         else if (wi::bit_and (may_be_nonzero, sign_bit)
> +                  != sign_bit)
> +           {
> +             /* If to-be-extended sign bit is zero.  */
> +             tmin = must_be_nonzero;
> +             tmax = may_be_nonzero;
> 
> likewise here tmin/tmax should be zero-extended may/must_be_nonzero from prec.
> 
> +    case SEXT_EXPR:
> +       {
> +         unsigned int prec = tree_to_uhwi (op1);
> +         wide_int sign_bit = wi::shwi (1ULL << (prec - 1),
> +                                       TYPE_PRECISION (TREE_TYPE (vr0.min)));
> +         wide_int mask = wi::shwi (((1ULL << (prec - 1)) - 1),
> +                                   TYPE_PRECISION (TREE_TYPE (vr0.max)));
> 
> this has the same host precision issues of 1ULL (HOST_WIDE_INT).
> There is wi::mask, eventually you can use wi::set_bit_in_zero to
> produce the sign-bit wide_int (also above).


Thanks Ricahrd. Does the attached patch looks better ?

Thanks,
Kugan

Comments

Richard Biener Oct. 12, 2015, 12:13 p.m. UTC | #1
On Sun, Oct 11, 2015 at 4:56 AM, Kugan
<kugan.vivekanandarajah@linaro.org> wrote:
>
>
> On 09/10/15 21:29, Richard Biener wrote:
>> +      unsigned int prec = tree_to_uhwi (vr1.min);
>>
>> this should use unsigned HOST_WIDE_INT
>>
>> +      wide_int sign_bit = wi::shwi (1ULL << (prec - 1),
>> +                                   TYPE_PRECISION (TREE_TYPE (vr0.min)));
>>
>> use wi::one (TYPE_PRECISION (TREE_TYPE (vr0.min))) << (prec - 1);
>>
>> That is, you really need to handle precisions bigger than HOST_WIDE_INT.
>>
>> But I suppose wide_int really misses a test_bit function (it has a set_bit
>> one already).
>>
>> +         if (wi::bit_and (must_be_nonzero, sign_bit) == sign_bit)
>> +           {
>> +             /* If to-be-extended sign bit is one.  */
>> +             tmin = type_min;
>> +             tmax = may_be_nonzero;
>>
>> I think tmax should be zero-extended may_be_nonzero from prec.
>>
>> +         else if (wi::bit_and (may_be_nonzero, sign_bit)
>> +                  != sign_bit)
>> +           {
>> +             /* If to-be-extended sign bit is zero.  */
>> +             tmin = must_be_nonzero;
>> +             tmax = may_be_nonzero;
>>
>> likewise here tmin/tmax should be zero-extended may/must_be_nonzero from prec.
>>
>> +    case SEXT_EXPR:
>> +       {
>> +         unsigned int prec = tree_to_uhwi (op1);
>> +         wide_int sign_bit = wi::shwi (1ULL << (prec - 1),
>> +                                       TYPE_PRECISION (TREE_TYPE (vr0.min)));
>> +         wide_int mask = wi::shwi (((1ULL << (prec - 1)) - 1),
>> +                                   TYPE_PRECISION (TREE_TYPE (vr0.max)));
>>
>> this has the same host precision issues of 1ULL (HOST_WIDE_INT).
>> There is wi::mask, eventually you can use wi::set_bit_in_zero to
>> produce the sign-bit wide_int (also above).
>
>
> Thanks Ricahrd. Does the attached patch looks better ?

Yes.  That variant is ok once prerequesites have been approved.

Thanks,
Richard.


> Thanks,
> Kugan
diff mbox

Patch

From cf5f75f5c96d30cdd968e71035a398cb0d5fcff7 Mon Sep 17 00:00:00 2001
From: Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
Date: Mon, 17 Aug 2015 13:45:52 +1000
Subject: [PATCH 3/7] Optimize ZEXT_EXPR with tree-vrp

---
 gcc/tree-vrp.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 70 insertions(+)

diff --git a/gcc/tree-vrp.c b/gcc/tree-vrp.c
index 2cd71a2..c04d290 100644
--- a/gcc/tree-vrp.c
+++ b/gcc/tree-vrp.c
@@ -2317,6 +2317,7 @@  extract_range_from_binary_expr_1 (value_range_t *vr,
       && code != LSHIFT_EXPR
       && code != MIN_EXPR
       && code != MAX_EXPR
+      && code != SEXT_EXPR
       && code != BIT_AND_EXPR
       && code != BIT_IOR_EXPR
       && code != BIT_XOR_EXPR)
@@ -2877,6 +2878,52 @@  extract_range_from_binary_expr_1 (value_range_t *vr,
       extract_range_from_multiplicative_op_1 (vr, code, &vr0, &vr1);
       return;
     }
+  else if (code == SEXT_EXPR)
+    {
+      gcc_assert (range_int_cst_p (&vr1));
+      HOST_WIDE_INT prec = tree_to_uhwi (vr1.min);
+      type = vr0.type;
+      wide_int tmin, tmax;
+      wide_int may_be_nonzero, must_be_nonzero;
+
+      wide_int type_min = wi::min_value (prec, SIGNED);
+      wide_int type_max = wi::max_value (prec, SIGNED);
+      type_min = wide_int_to_tree (expr_type, type_min);
+      type_max = wide_int_to_tree (expr_type, type_max);
+      wide_int sign_bit
+	= wi::set_bit_in_zero (prec - 1,
+			       TYPE_PRECISION (TREE_TYPE (vr0.min)));
+      if (zero_nonzero_bits_from_vr (expr_type, &vr0,
+				     &may_be_nonzero,
+				     &must_be_nonzero))
+	{
+	  if (wi::bit_and (must_be_nonzero, sign_bit) == sign_bit)
+	    {
+	      /* If to-be-extended sign bit is one.  */
+	      tmin = type_min;
+	      tmax = wi::zext (may_be_nonzero, prec);
+	    }
+	  else if (wi::bit_and (may_be_nonzero, sign_bit)
+		   != sign_bit)
+	    {
+	      /* If to-be-extended sign bit is zero.  */
+	      tmin = wi::zext (must_be_nonzero, prec);
+	      tmax = wi::zext (may_be_nonzero, prec);
+	    }
+	  else
+	    {
+	      tmin = type_min;
+	      tmax = type_max;
+	    }
+	}
+      else
+	{
+	  tmin = type_min;
+	  tmax = type_max;
+	}
+      min = wide_int_to_tree (expr_type, tmin);
+      max = wide_int_to_tree (expr_type, tmax);
+    }
   else if (code == RSHIFT_EXPR
 	   || code == LSHIFT_EXPR)
     {
@@ -9244,6 +9291,28 @@  simplify_bit_ops_using_ranges (gimple_stmt_iterator *gsi, gimple *stmt)
 	  break;
 	}
       break;
+    case SEXT_EXPR:
+	{
+	  unsigned int prec = tree_to_uhwi (op1);
+	  wide_int sign_bit
+	    = wi::set_bit_in_zero (prec - 1,
+				   TYPE_PRECISION (TREE_TYPE (vr0.min)));
+	  wide_int mask = wi::mask (prec, true,
+				    TYPE_PRECISION (TREE_TYPE (vr0.min)));
+	  if (wi::bit_and (must_be_nonzero0, sign_bit) == sign_bit)
+	    {
+	      /* If to-be-extended sign bit is one.  */
+	      if (wi::bit_and (must_be_nonzero0, mask) == mask)
+		op = op0;
+	    }
+	  else if (wi::bit_and (may_be_nonzero0, sign_bit) != sign_bit)
+	    {
+	      /* If to-be-extended sign bit is zero.  */
+	      if (wi::bit_and (may_be_nonzero0, mask) == 0)
+		op = op0;
+	    }
+	}
+      break;
     default:
       gcc_unreachable ();
     }
@@ -9946,6 +10015,7 @@  simplify_stmt_using_ranges (gimple_stmt_iterator *gsi)
 
 	case BIT_AND_EXPR:
 	case BIT_IOR_EXPR:
+	case SEXT_EXPR:
 	  /* Optimize away BIT_AND_EXPR and BIT_IOR_EXPR
 	     if all the bits being cleared are already cleared or
 	     all the bits being set are already set.  */
-- 
1.9.1