@@ -27544,25 +27544,36 @@ vfp3_const_double_for_fract_bits (rtx operand)
return 0;
}
+/* If X is a CONST_DOUBLE with a value that is a power of 2 whose
+ log2 is in [1, 32], return that log2. Otherwise return -1.
+ This is used in the patterns for vcvt.s32.f32 floating-point to
+ fixed-point conversions. */
+
int
-vfp3_const_double_for_bits (rtx operand)
+vfp3_const_double_for_bits (rtx x)
{
- REAL_VALUE_TYPE r0;
+ if (!CONST_DOUBLE_P (x))
+ return -1;
- if (!CONST_DOUBLE_P (operand))
- return 0;
+ REAL_VALUE_TYPE r;
- REAL_VALUE_FROM_CONST_DOUBLE (r0, operand);
- if (exact_real_truncate (DFmode, &r0))
- {
- HOST_WIDE_INT value = real_to_integer (&r0);
- value = value & 0xffffffff;
- if ((value != 0) && ( (value & (value - 1)) == 0))
- return int_log2 (value);
- }
+ REAL_VALUE_FROM_CONST_DOUBLE (r, x);
+ if (REAL_VALUE_NEGATIVE (r)
+ || REAL_VALUE_ISNAN (r)
+ || REAL_VALUE_ISINF (r)
+ || !real_isinteger (&r, SFmode))
+ return -1;
- return 0;
+ HOST_WIDE_INT hwint = exact_log2 (real_to_integer (&r));
+
+ /* The exact_log2 above will have returned -1 if this is
+ not an exact log2. */
+ if (!IN_RANGE (hwint, 1, 32))
+ return -1;
+
+ return hwint;
}
+
/* Emit a memory barrier around an atomic sequence according to MODEL. */
@@ -339,7 +339,8 @@
"@internal
In ARM/ Thumb2 a const_double which can be used with a vcvt.s32.f32 with bits operation"
(and (match_code "const_double")
- (match_test "TARGET_32BIT && TARGET_VFP && vfp3_const_double_for_bits (op)")))
+ (match_test "TARGET_32BIT && TARGET_VFP
+ && vfp3_const_double_for_bits (op) > 0")))
(define_register_constraint "Ts" "(arm_restrict_it) ? LO_REGS : GENERAL_REGS"
"For arm_restrict_it the core registers @code{r0}-@code{r7}. GENERAL_REGS otherwise.")
@@ -668,7 +668,7 @@
(define_predicate "const_double_vcvt_power_of_two"
(and (match_code "const_double")
(match_test "TARGET_32BIT && TARGET_VFP
- && vfp3_const_double_for_bits (op)")))
+ && vfp3_const_double_for_bits (op) > 0")))
(define_predicate "neon_struct_operand"
(and (match_code "mem")
new file mode 100644
@@ -0,0 +1,21 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_vfp3_ok } */
+/* { dg-options "-O2 -fno-inline" } */
+/* { dg-add-options arm_vfp3 } */
+/* { dg-skip-if "need fp instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */
+
+int
+foo (float a)
+{
+ return a * 4.9f;
+}
+
+
+int
+main (void)
+{
+ if (foo (10.0f) != 49)
+ __builtin_abort ();
+
+ return 0;
+}
\ No newline at end of file
Hi all, This is the 4.9 and GCC 5 version of the patch I posted earlier to fix the referenced PR. Bootstrapped and tested arm-none-linux-gnueabihf on those branches. Ok for the branches? Thanks, Kyrill 2015-10-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/67929 * config/arm/arm.c (vfp3_const_double_for_bits): Rewrite. * config/arm/constraints.md (Dp): Update callsite. * config/arm/predicates.md (const_double_vcvt_power_of_two): Likewise. 2015-10-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/67929 * gcc.target/arm/pr67929_1.c: New test.