diff mbox series

[2/7] clocksource: timer-npcm7xx: Enable timer 1 clock before use

Message ID 20220422183012.444674-3-j.neuschaefer@gmx.net
State New
Headers show
Series [1/7] dt-bindings: timer: nuvoton,npcm7xx-timer: Allow specifying all clocks | expand

Commit Message

J. Neuschäfer April 22, 2022, 6:30 p.m. UTC 
In the WPCM450 SoC, the clocks for each timer can be gated individually.
To prevent the timer 1 clock from being gated, enable it explicitly.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
---
 drivers/clocksource/timer-npcm7xx.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

--
2.35.1
diff mbox series

Patch

diff --git a/drivers/clocksource/timer-npcm7xx.c b/drivers/clocksource/timer-npcm7xx.c
index a00520cbb660a..974269b6b0c36 100644
--- a/drivers/clocksource/timer-npcm7xx.c
+++ b/drivers/clocksource/timer-npcm7xx.c
@@ -188,17 +188,29 @@  static void __init npcm7xx_clocksource_init(void)

 static int __init npcm7xx_timer_init(struct device_node *np)
 {
+	struct clk *clk;
 	int ret;

 	ret = timer_of_init(np, &npcm7xx_to);
-	if (ret)
+	if (ret) {
+		pr_warn("timer_of_init failed: %d\n", ret);
 		return ret;
+	}

 	/* Clock input is divided by PRESCALE + 1 before it is fed */
 	/* to the counter */
 	npcm7xx_to.of_clk.rate = npcm7xx_to.of_clk.rate /
 		(NPCM7XX_Tx_MIN_PRESCALE + 1);

+	/* Enable the clock for timer1, if it exists */
+	clk = of_clk_get(np, 1);
+	if (clk) {
+		if (!IS_ERR(clk))
+			clk_prepare_enable(clk);
+		else
+			pr_warn("Failed to get clock for timer1: %pe", clk);
+	}
+
 	npcm7xx_clocksource_init();
 	npcm7xx_clockevents_init();