Message ID | 20220501192557.2631936-6-mail@conchuod.ie |
---|---|
State | New |
Headers | show |
Series | PolarFire SoC dt for 5.19 | expand |
diff --git a/arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi similarity index 91% rename from arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi rename to arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi index ccaac3371cf9..0d28858b83f2 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi @@ -2,6 +2,8 @@ /* Copyright (c) 2020-2021 Microchip Technology Inc */ / { + compatible = "microchip,mpfs-icicle-reference-rtlv2203", "microchip,mpfs"; + core_pwm0: pwm@41000000 { compatible = "microchip,corepwm-rtl-v4"; reg = <0x0 0x41000000 0x0 0xF0>; diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts index 84b0015dfd47..739dfa52bed1 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts @@ -4,6 +4,7 @@ /dts-v1/; #include "mpfs.dtsi" +#include "mpfs-icicle-kit-fabric.dtsi" /* Clock frequency (in Hz) of the rtcclk */ #define RTCCLK_FREQ 1000000 diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi index cc3386068c2d..695c4e2807f5 100644 --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi @@ -3,7 +3,6 @@ /dts-v1/; #include "dt-bindings/clock/microchip,mpfs-clock.h" -#include "mpfs-fabric.dtsi" / { #address-cells = <2>;