Message ID | 20220513061347.46480-2-krzysztof.kozlowski@linaro.org |
---|---|
State | New |
Headers | show |
Series | ufs: set power domain performance state when scaling gears | expand |
On Fri, 13 May 2022 08:13:41 +0200, Krzysztof Kozlowski wrote: > Allow Qualcomm GCC to register its parent power domain (e.g. RPMHPD) to > properly pass performance state from children. > > Applied, thanks! [1/7] dt-bindings: clock: qcom,gcc-sdm845: add parent power domain commit: d62cac46b0184b8730c68b01359a33769fee821b Best regards,
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml index d902f137ab17..daf7906ebc40 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml @@ -43,6 +43,9 @@ properties: '#reset-cells': const: 1 + power-domains: + maxItems: 1 + '#power-domain-cells': const: 1