Message ID | 20220928-mdm9615-dt-schema-fixes-v1-3-b6e63a7df1e8@linaro.org |
---|---|
State | New |
Headers | show |
Series | arm: qcom: mdm9615: first round of bindings and DT fixes | expand |
diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index b06bbe25fdd4..e547becc9f75 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -28,6 +28,7 @@ cpus { cpu0: cpu@0 { compatible = "arm,cortex-a5"; device_type = "cpu"; + reg = <0>; next-level-cache = <&L2>; }; };
Fixes cpu@0: 'reg' is a required property from dtbs check. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>