@@ -35,6 +35,7 @@
#define IMX2_WDT_WCR 0x00 /* Control Register */
#define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
+#define IMX2_WDT_WCR_WDW BIT(7) /* -> Watchdog disable for WAIT */
#define IMX2_WDT_WCR_WDA BIT(5) /* -> External Reset WDOG_B */
#define IMX2_WDT_WCR_SRS BIT(4) /* -> Software Reset Signal */
#define IMX2_WDT_WCR_WRE BIT(3) /* -> WDOG Reset Enable */
@@ -67,6 +68,27 @@ struct imx2_wdt_device {
bool ext_reset;
bool clk_is_on;
bool no_ping;
+ bool sleep_wait;
+};
+
+static const char * const wdw_boards[] __initconst = {
+ "fsl,imx25-wdt",
+ "fsl,imx35-wdt",
+ "fsl,imx50-wdt",
+ "fsl,imx51-wdt",
+ "fsl,imx53-wdt",
+ "fsl,imx6q-wdt",
+ "fsl,imx6sl-wdt",
+ "fsl,imx6sll-wdt",
+ "fsl,imx6sx-wdt",
+ "fsl,imx6ul-wdt",
+ "fsl,imx7d-wdt",
+ "fsl,imx8mm-wdt",
+ "fsl,imx8mn-wdt",
+ "fsl,imx8mp-wdt",
+ "fsl,imx8mq-wdt",
+ "fsl,vf610-wdt",
+ NULL
};
static bool nowayout = WATCHDOG_NOWAYOUT;
@@ -129,6 +151,9 @@ static inline void imx2_wdt_setup(struct watchdog_device *wdog)
/* Suspend timer in low power mode, write once-only */
val |= IMX2_WDT_WCR_WDZST;
+ /* Suspend timer in low power WAIT mode, write once-only */
+ if (wdev->sleep_wait)
+ val |= IMX2_WDT_WCR_WDW;
/* Strip the old watchdog Time-Out value */
val &= ~IMX2_WDT_WCR_WT;
/* Generate internal chip-level reset if WDOG times out */
@@ -313,6 +338,18 @@ static int __init imx2_wdt_probe(struct platform_device *pdev)
wdev->ext_reset = of_property_read_bool(dev->of_node,
"fsl,ext-reset-output");
+
+ if (of_property_read_bool(dev->of_node, "fsl,suspend-in-wait"))
+ if (of_device_compatible_match(dev->of_node, wdw_boards))
+ wdev->sleep_wait = 1;
+ else {
+ dev_warn(dev, "Warning: Suspending watchdog during " \
+ "WAIT mode is not supported for this device.\n");
+ wdev->sleep_wait = 0;
+ }
+ else
+ wdev->sleep_wait = 0;
+
/*
* The i.MX7D doesn't support low power mode, so we need to ping the watchdog
* during suspend.