Message ID | 20221107175305.63975-5-prabhakar.mahadev-lad.rj@bp.renesas.com |
---|---|
State | New |
Headers | show |
Series | Add IRQC support to RZ/G2UL SoC | expand |
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi index 44b9bc6294be..afb1abaa8b9a 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi @@ -531,6 +531,8 @@ pinctrl: pinctrl@11030000 { gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pinctrl 0 0 152>; + #interrupt-cells = <2>; + interrupt-controller; clocks = <&cpg CPG_MOD R9A07G043_GPIO_HCLK>; power-domains = <&cpg>; resets = <&cpg R9A07G043_GPIO_RSTN>, diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi index 7a8ed7ae253b..65e7b029361e 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi @@ -98,6 +98,10 @@ &irqc { resets = <&cpg R9A07G043_IA55_RESETN>; }; +&pinctrl { + interrupt-parent = <&irqc>; +}; + &soc { interrupt-parent = <&gic>;