| Message ID | 1669810824-32094-1-git-send-email-quic_vnivarth@quicinc.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | dmaengine: qcom: gpi: Set link_rx bit on GO TRE for rx operation | expand |
On 12/2/2022 4:17 AM, Doug Anderson wrote: > Hi, > > On Wed, Nov 30, 2022 at 4:20 AM Vijaya Krishna Nivarthi > <quic_vnivarth@quicinc.com> wrote: >> As per GSI spec, link_rx bit is to be set on GO TRE on tx >> channel whenever there is going to be a DMA TRE on rx >> channel. This is currently set for duplex operation only. >> >> Set the bit for rx operation as well. >> >> Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> >> --- >> drivers/dma/qcom/gpi.c | 1 + >> 1 file changed, 1 insertion(+) > I don't feel qualified to actually give this a review since I don't > know anything about the details of GSI/GPI. It seems simple enough so > I'll just assume that Bjorn will land it. Ideally someone else at > Qualcomm would give you a Reviewed-by tag. > > One drive-by comment, though, is that I would say that your patch > description lacks an answer to the question: "So what?" > > In other words, what is broken today? Does everything work fine today > but some bit counter looked over your shoulder and told you that you > were a bad person for not setting that bit? Did the lunar lander catch > fire (despite the lack of Oxygen on the moon!) because it started > using the RX transfer mode to talk to its fuel valve system and the RX > transfer mode never worked? ...or maybe everything today works but the > super secret Qualcomm SDM9002 (shhhh!) chip needs this bit set? Help > people looking at your patch be able to decide if it's important for > them to pick to their kernel tree! :-) :-) Thank you very much for the input. Will keep that in mind for next. Some info... rx is actually broken for spi gsi. A plain rx operation would crash right now and patch for same would come next; There are 3 further patches as well for gsi. I started with simplest patch hoping it would get in quick. While trying to bring up EC use case with spi gsi, we made some changes to conform to GSI spec, made some progress but still couldn't get it to work. In the meantime we switched to SE DMA as interim. > -Doug
Gentle reminder to review/approve please. Thank you... On 11/30/2022 5:50 PM, Vijaya Krishna Nivarthi wrote: > As per GSI spec, link_rx bit is to be set on GO TRE on tx > channel whenever there is going to be a DMA TRE on rx > channel. This is currently set for duplex operation only. > > Set the bit for rx operation as well. > > Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> > --- > drivers/dma/qcom/gpi.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c > index 061add8..59a36cb 100644 > --- a/drivers/dma/qcom/gpi.c > +++ b/drivers/dma/qcom/gpi.c > @@ -1756,6 +1756,7 @@ static int gpi_create_spi_tre(struct gchan *chan, struct gpi_desc *desc, > tre->dword[3] = u32_encode_bits(TRE_TYPE_GO, TRE_FLAGS_TYPE); > if (spi->cmd == SPI_RX) { > tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_IEOB); > + tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_LINK); > } else if (spi->cmd == SPI_TX) { > tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_CHAIN); > } else { /* SPI_DUPLEX */
Hi, On Fri, Dec 16, 2022 at 4:15 AM Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> wrote: > > Gentle reminder to review/approve please. > > Thank you... I was expecting you to send a v2 where you beefed up the patch description to add the "why". Maybe others are as well? I suppose with that I could add a weak Reviewed-by to the patch. This is also a bad time for patches to be applied--it's right in the middle of the merge window. Usually the best time to send reminders is between -rc1 and -rc5. Officially "Fixes" could be applied at any time (even during the merge window), but unless it's urgent that usually doesn't happen. Speaking of which, given your updated description, I'd say that this _is_ a fix. Perhaps you should add a "Fixes" tag? That might actually help it get applied sooner. ;-) -Doug
diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c index 061add8..59a36cb 100644 --- a/drivers/dma/qcom/gpi.c +++ b/drivers/dma/qcom/gpi.c @@ -1756,6 +1756,7 @@ static int gpi_create_spi_tre(struct gchan *chan, struct gpi_desc *desc, tre->dword[3] = u32_encode_bits(TRE_TYPE_GO, TRE_FLAGS_TYPE); if (spi->cmd == SPI_RX) { tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_IEOB); + tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_LINK); } else if (spi->cmd == SPI_TX) { tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_CHAIN); } else { /* SPI_DUPLEX */
As per GSI spec, link_rx bit is to be set on GO TRE on tx channel whenever there is going to be a DMA TRE on rx channel. This is currently set for duplex operation only. Set the bit for rx operation as well. Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> --- drivers/dma/qcom/gpi.c | 1 + 1 file changed, 1 insertion(+)