@@ -44,3 +44,9 @@ [LibraryClasses]
MemoryAllocationLib
PciLib
QemuFwCfgLib
+
+[Pcd]
+ gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase
+ gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize
+ gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base
+ gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size
@@ -95,6 +95,14 @@ InitRootBridge (
RootBus->MemAbove4G.Base = 0;
RootBus->MemAbove4G.Limit = 0;
+ RootBus->Bus.Base = RootBusNumber;
+ RootBus->Bus.Limit = MaxSubBusNumber;
+ RootBus->Io.Base = PcdGet64 (PcdPciIoBase);
+ RootBus->Io.Limit = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);
+ RootBus->Mem.Base = PcdGet64 (PcdPciMmio32Base);
+ RootBus->Mem.Limit = PcdGet64 (PcdPciMmio32Base) +
+ (PcdGet64 (PcdPciMmio32Size) - 1);
+
return EFI_OUT_OF_RESOURCES;
}
The bus aperture is copied verbatim from InitRootBridge() [OvmfPkg/PciHostBridgeDxe/PciHostBridge.c]. The IO and 32-bit MMIO apertures are matched to PlatformPei's settings. PciHostBridgeLibDxe expects PciHostBridgeLib instances to advertize the exact apertures. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> --- OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf | 6 ++++++ OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c | 8 ++++++++ 2 files changed, 14 insertions(+) -- 1.8.3.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel