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[2/5] interconnect: qcom: msm8996: Provide UFS clocks to A2NoC

Message ID 20221210200353.418391-3-konrad.dybcio@linaro.org
State Accepted
Commit 60426ff08af6a21275d9c879c0dfb09406469868
Headers show
Series [1/5] dt-bindings: interconnect: Add UFS clocks to MSM8996 A2NoC | expand

Commit Message

Konrad Dybcio Dec. 10, 2022, 8:03 p.m. UTC
On eMMC devices the bootloader has no business enabling UFS clocks.
That results in a platform hang and hard reboot when trying to vote
on paths including MASTER_UFS and since sync_state guarantees that
it's done at boot time, this effectively prevents such devices from
booting. Fix that.

Fixes: 7add937f5222 ("interconnect: qcom: Add MSM8996 interconnect provider driver")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 drivers/interconnect/qcom/msm8996.c | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Dmitry Baryshkov Dec. 10, 2022, 8:52 p.m. UTC | #1
On Sat, 10 Dec 2022 at 23:04, Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>
> On eMMC devices the bootloader has no business enabling UFS clocks.
> That results in a platform hang and hard reboot when trying to vote
> on paths including MASTER_UFS and since sync_state guarantees that
> it's done at boot time, this effectively prevents such devices from
> booting. Fix that.

The vendor kernel separates bus clocks and QoS clocks, so there is
possibly room for improvement.

Anyway:

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

>
> Fixes: 7add937f5222 ("interconnect: qcom: Add MSM8996 interconnect provider driver")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
>  drivers/interconnect/qcom/msm8996.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c
> index c2903ae3b3bc..7ddb1f23fb2a 100644
> --- a/drivers/interconnect/qcom/msm8996.c
> +++ b/drivers/interconnect/qcom/msm8996.c
> @@ -33,6 +33,13 @@ static const char * const bus_a0noc_clocks[] = {
>         "aggre0_noc_mpu_cfg"
>  };
>
> +static const char * const bus_a2noc_clocks[] = {
> +       "bus",
> +       "bus_a",
> +       "aggre2_ufs_axi",
> +       "ufs_axi"
> +};
> +
>  static const u16 mas_a0noc_common_links[] = {
>         MSM8996_SLAVE_A0NOC_SNOC
>  };
> @@ -1859,6 +1866,8 @@ static const struct qcom_icc_desc msm8996_a2noc = {
>         .type = QCOM_ICC_NOC,
>         .nodes = a2noc_nodes,
>         .num_nodes = ARRAY_SIZE(a2noc_nodes),
> +       .clocks = bus_a2noc_clocks,
> +       .num_clocks = ARRAY_SIZE(bus_a2noc_clocks),
>         .regmap_cfg = &msm8996_a2noc_regmap_config
>  };
>
> --
> 2.38.1
>
diff mbox series

Patch

diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c
index c2903ae3b3bc..7ddb1f23fb2a 100644
--- a/drivers/interconnect/qcom/msm8996.c
+++ b/drivers/interconnect/qcom/msm8996.c
@@ -33,6 +33,13 @@  static const char * const bus_a0noc_clocks[] = {
 	"aggre0_noc_mpu_cfg"
 };
 
+static const char * const bus_a2noc_clocks[] = {
+	"bus",
+	"bus_a",
+	"aggre2_ufs_axi",
+	"ufs_axi"
+};
+
 static const u16 mas_a0noc_common_links[] = {
 	MSM8996_SLAVE_A0NOC_SNOC
 };
@@ -1859,6 +1866,8 @@  static const struct qcom_icc_desc msm8996_a2noc = {
 	.type = QCOM_ICC_NOC,
 	.nodes = a2noc_nodes,
 	.num_nodes = ARRAY_SIZE(a2noc_nodes),
+	.clocks = bus_a2noc_clocks,
+	.num_clocks = ARRAY_SIZE(bus_a2noc_clocks),
 	.regmap_cfg = &msm8996_a2noc_regmap_config
 };