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[3/3] mtd: mediatek: device tree enable NAND in MTK's 2701 evb

Message ID 1456938013-8819-4-git-send-email-jorge.ramirez-ortiz@linaro.org
State New
Headers show

Commit Message

Jorge Ramirez-Ortiz March 2, 2016, 5 p.m. UTC 
MTK's SoC 2701 implements a Smart Device Gen1 type of NAND controller.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>

---
 arch/arm/boot/dts/mt2701-evb.dts |  4 ++++
 arch/arm/boot/dts/mt2701.dtsi    | 12 ++++++++++++
 2 files changed, 16 insertions(+)

-- 
2.1.4


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Patch

diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts
index 082ca88..296e148 100644
--- a/arch/arm/boot/dts/mt2701-evb.dts
+++ b/arch/arm/boot/dts/mt2701-evb.dts
@@ -27,3 +27,7 @@ 
 &uart0 {
 	status = "okay";
 };
+
+&nand {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index 3766904..6191c75 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -143,4 +143,16 @@ 
 		clocks = <&uart_clk>;
 		status = "disabled";
 	};
+
+	nand: nfi@1100d000 {
+		compatible = "mediatek,mt2701-nfc";
+		reg = <0 0x1100d000 0 0x1000>, <0 0x1100e000 0 0x1000>;
+		interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_LOW>,
+			<GIC_SPI 55 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&pericfg CLK_PERI_NFI>, <&pericfg CLK_PERI_NFI_ECC>,
+			<&pericfg CLK_PERI_NFI_PAD>;
+		clock-names = "nfi_clk", "nfiecc_clk", "pad_clk";
+		nand-on-flash-bbt;
+		status = "disabled";
+	};
 };