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[V2,2/6] ARM: keystone2: K2G: power-off DSP during boot

Message ID 1457109403-26251-3-git-send-email-nm@ti.com
State New
Headers show

Commit Message

Nishanth Menon March 4, 2016, 4:36 p.m. UTC 
From: Suman Anna <s-anna@ti.com>


The DSPs are powered on by default upon a Power ON reset, and
they are powered off on current Keystone 2 SoCs - K2HK, K2L, K2E
during the boot in u-boot. This is not functional on K2G though.
Extend the existing DSP power-off support to the only DSP present
on K2G. Do note that the PSC clock domain module id for DSP on K2G
differs from that of previous Keystone2 SoCs.

Signed-off-by: Suman Anna <s-anna@ti.com>

Signed-off-by: Nishanth Menon <nm@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

---
Changes in V2:
	- Picked up Reviewed by
V1: https://patchwork.ozlabs.org/patch/588157/

 arch/arm/mach-keystone/include/mach/hardware-k2g.h | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

-- 
2.7.0

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diff mbox

Patch

diff --git a/arch/arm/mach-keystone/include/mach/hardware-k2g.h b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
index fa4162fe9964..ca2a119d3901 100644
--- a/arch/arm/mach-keystone/include/mach/hardware-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
@@ -10,7 +10,7 @@ 
 #ifndef __ASM_ARCH_HARDWARE_K2G_H
 #define __ASM_ARCH_HARDWARE_K2G_H
 
-#define KS2_NUM_DSPS	0
+#define KS2_NUM_DSPS			1
 
 /* Power and Sleep Controller (PSC) Domains */
 #define KS2_LPSC_ALWAYSON		0
@@ -30,7 +30,10 @@ 
 #define KS2_LPSC_MCASP			15
 #define KS2_LPSC_SR			16
 #define KS2_LPSC_MSMC			17
-#define KS2_LPSC_GEM			18
+#ifdef KS2_LPSC_GEM_0
+#undef KS2_LPSC_GEM_0
+#endif
+#define KS2_LPSC_GEM_0			18
 #define KS2_LPSC_ARM			19
 #define KS2_LPSC_ASRC			20
 #define KS2_LPSC_ICSS			21