Message ID | 4737bcbce591e59b2f29d9141c1a5e41e64cc4f4.1672148732.git.quic_schowdhu@quicinc.com |
---|---|
State | Superseded |
Headers | show |
Series | [V21,1/7] dt-bindings: soc: qcom,dcc: Add the dtschema | expand |
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index cef8c4f..38a840b 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1767,6 +1767,12 @@ interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; }; + dma@10a2000 { + compatible = "qcom,sm8150-dcc", "qcom,dcc"; + reg = <0x0 0x010a2000 0x0 0x1000>, + <0x0 0x010ad000 0x0 0x3000>; + }; + pcie0: pci@1c00000 { compatible = "qcom,pcie-sm8150", "snps,dw-pcie"; reg = <0 0x01c00000 0 0x3000>,
Add the DCC(Data Capture and Compare) device tree node entry along with the addresses for register regions. Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com> --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)