@@ -51,4 +51,6 @@ [Pcd]
gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize
gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base
gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size
+ gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base
+ gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId
@@ -132,6 +132,13 @@ InitRootBridge (
RootBus->MemAbove4G.Base = 0;
RootBus->MemAbove4G.Limit = 0;
+ if (PcdGet64 (PcdPciMmio64Size) > 0) {
+ RootBus->AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
+ RootBus->MemAbove4G.Base = PcdGet64 (PcdPciMmio64Base);
+ RootBus->MemAbove4G.Limit = PcdGet64 (PcdPciMmio64Base) +
+ (PcdGet64 (PcdPciMmio64Size) - 1);
+ }
+
RootBus->Bus.Base = RootBusNumber;
RootBus->Bus.Limit = MaxSubBusNumber;
RootBus->Io.Base = PcdGet64 (PcdPciIoBase);
On the normal boot path (which is when PciHostBridgeDxe runs), the PCDs have been calculated; report the 64-bit PCI host aperture to PciHostBridgeDxe. In the Ia32 build, the PCD values (zeros) come directly from the DEC file, and this patch makes no difference. Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Thomas Lamprecht <t.lamprecht@proxmox.com> Ref: https://github.com/tianocore/edk2/issues/59 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> --- OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf | 2 ++ OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c | 7 +++++++ 2 files changed, 9 insertions(+) -- 1.8.3.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel