| Message ID | 20221231164628.19688-2-samuel@sholland.org |
|---|---|
| State | New |
| Headers | show |
| Series | Allwinner D1 video engine support | expand |
Hi Paul, On 1/5/23 04:43, Paul Kocialkowski wrote: > On Sat 31 Dec 22, 10:46, Samuel Holland wrote: >> The Allwinner D1 SoC contains a separate power domain for its video >> engine, controlled via the "PPU" power controller. Allow the >> power-domains property so this can be represented in the devicetree. > > I've been looking around for information regarding the PPU and couldn't find > anything about it. Do you have some reference where it is mentionned? There are some oblique references as far back as H6 in some user manuals (in the bus block diagram and interrupt list) and in the vendor clock drivers. I gathered some information here: https://linux-sunxi.org/PPU It is used by OpenSBI for CPU idle: https://github.com/riscv-software-src/opensbi/commit/9dc5ec5c.patch and I have a series adding PPU support to Linux for the Video Engine: https://lore.kernel.org/linux-sunxi/20221231160402.16157-1-samuel@sholland.org/ > I do see a power domain driver (apparently for the GPU) on recent allwinner > kernel releases but that seems to be for arm64 chips only. Yes, there is an older GPU-specific power domain hardware, and the generic one found on D1/R528/T113 and newer. However, I found while writing the Linux driver that the two are more similar than the vendor drivers would imply. Most of the registers from the old hardware remain in the new hardware; they just are not used by the new vendor driver. So you can reference my Linux series for a full register list. Regards, Samuel >> Signed-off-by: Samuel Holland <samuel@sholland.org> >> --- >> >> .../bindings/media/allwinner,sun4i-a10-video-engine.yaml | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml >> index 541325f900a1..d5be7f604e8c 100644 >> --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml >> +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml >> @@ -63,6 +63,9 @@ properties: >> CMA pool to use for buffers allocation instead of the default >> CMA pool. >> >> + power-domains: >> + maxItems: 1 >> + >> required: >> - compatible >> - reg >> -- >> 2.37.4 >> >
Dne sobota, 31. december 2022 ob 17:46:24 CET je Samuel Holland napisal(a): > The Allwinner D1 SoC contains a separate power domain for its video > engine, controlled via the "PPU" power controller. Allow the > power-domains property so this can be represented in the devicetree. > > Signed-off-by: Samuel Holland <samuel@sholland.org> > --- > > .../bindings/media/allwinner,sun4i-a10-video-engine.yaml | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git > a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine. > yaml > b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine. > yaml index 541325f900a1..d5be7f604e8c 100644 > --- > a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine. > yaml +++ > b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine. > yaml @@ -63,6 +63,9 @@ properties: > CMA pool to use for buffers allocation instead of the default > CMA pool. > > + power-domains: > + maxItems: 1 Please add check if it's needed based on compatible. This yaml is one of the few for sunxi platform which doesn't have strict checks. Same goes for sram property. Best regards, Jernej > + > required: > - compatible > - reg
diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml index 541325f900a1..d5be7f604e8c 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml @@ -63,6 +63,9 @@ properties: CMA pool to use for buffers allocation instead of the default CMA pool. + power-domains: + maxItems: 1 + required: - compatible - reg
The Allwinner D1 SoC contains a separate power domain for its video engine, controlled via the "PPU" power controller. Allow the power-domains property so this can be represented in the devicetree. Signed-off-by: Samuel Holland <samuel@sholland.org> --- .../bindings/media/allwinner,sun4i-a10-video-engine.yaml | 3 +++ 1 file changed, 3 insertions(+)