@@ -6740,6 +6740,18 @@ void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask)
if (change & R_SVCR_SM_MASK) {
arm_reset_sve_state(env);
}
+
+ /*
+ * ResetSMEState.
+ *
+ * SetPSTATE_ZA zeros on enable and disable. We can zero this only
+ * on enable: while disabled, the storage is inaccessible and the
+ * value does not matter. We're not saving the storage in vmstate
+ * when disabled either.
+ */
+ if (change & new & R_SVCR_ZA_MASK) {
+ memset(env->zarray, 0, sizeof(env->zarray));
+ }
}
static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
@@ -44,18 +44,6 @@ void helper_set_pstate_za(CPUARMState *env, uint32_t i)
return;
}
aarch64_set_svcr(env, 0, R_SVCR_ZA_MASK);
-
- /*
- * ResetSMEState.
- *
- * SetPSTATE_ZA zeros on enable and disable. We can zero this only
- * on enable: while disabled, the storage is inaccessible and the
- * value does not matter. We're not saving the storage in vmstate
- * when disabled either.
- */
- if (i) {
- memset(env->zarray, 0, sizeof(env->zarray));
- }
arm_rebuild_hflags(env);
}