| Message ID | 20230123101631.475712-2-robimarko@gmail.com |
|---|---|
| State | Accepted |
| Commit | a1ab382704f59c917a497b44e7552c4f2eb4faf7 |
| Headers | show |
| Series | [v2,1/2] dt-bindings: nvmem: qfprom: add IPQ8074 compatible | expand |
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index 8eba586065a3..ff59a2f38293 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -301,6 +301,13 @@ mdio: mdio@90000 { status = "disabled"; }; + qfprom: efuse@a4000 { + compatible = "qcom,ipq8074-qfprom", "qcom,qfprom"; + reg = <0x000a4000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + }; + prng: rng@e3000 { compatible = "qcom,prng-ee"; reg = <0x000e3000 0x1000>;
IPQ8074 has efuses like other Qualcomm SoC-s that are required for determining various HW quirks which will be required later for CPR etc, so lets add the QFPROM node for start. Individidual fuses will be added as they are required. Signed-off-by: Robert Marko <robimarko@gmail.com> --- Changes in v2: * Enlarge the register space size due to info from Kathiravan T. --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)