@@ -869,6 +869,8 @@ struct cxl_dev_state *cxl_dev_state_create(struct device *dev)
mutex_init(&cxlds->mbox_mutex);
cxlds->dev = dev;
+ cxlds->pmem_qtg_id = -1;
+ cxlds->ram_qtg_id = -1;
return cxlds;
}
@@ -251,6 +251,8 @@ struct cxl_dev_state {
struct resource dpa_res;
struct resource pmem_res;
struct resource ram_res;
+ int pmem_qtg_id;
+ int ram_qtg_id;
u64 total_bytes;
u64 volatile_only_bytes;
u64 persistent_only_bytes;
@@ -68,6 +68,39 @@ static int cxl_port_qos_calculate(struct cxl_port *port)
return 0;
}
+static bool dpa_match_qtg_range(struct range *dpa, struct range *qtg)
+{
+ if (dpa->start >= qtg->start && dpa->end <= qtg->end)
+ return true;
+ return false;
+}
+
+static void cxl_dev_set_qtg(struct cxl_port *port, struct cxl_dev_state *cxlds)
+{
+ struct dsmas_entry *dent;
+ struct range ram_range = {
+ .start = cxlds->ram_res.start,
+ .end = cxlds->ram_res.end,
+ };
+ struct range pmem_range = {
+ .start = cxlds->pmem_res.start,
+ .end = cxlds->pmem_res.end,
+ };
+
+ mutex_lock(&port->cdat.dsmas_lock);
+ list_for_each_entry(dent, &port->cdat.dsmas_list, list) {
+ if (dpa_match_qtg_range(&ram_range, &dent->dpa_range)) {
+ cxlds->ram_qtg_id = dent->qtg_id;
+ break;
+ }
+ if (dpa_match_qtg_range(&pmem_range, &dent->dpa_range)) {
+ cxlds->pmem_qtg_id = dent->qtg_id;
+ break;
+ }
+ }
+ mutex_unlock(&port->cdat.dsmas_lock);
+}
+
static int cxl_port_probe(struct device *dev)
{
struct cxl_port *port = to_cxl_port(dev);
@@ -134,6 +167,8 @@ static int cxl_port_probe(struct device *dev)
rc = cxl_mem_create_range_info(cxlds);
if (rc)
return rc;
+
+ cxl_dev_set_qtg(port, cxlds);
}
rc = devm_cxl_enumerate_decoders(cxlhdm);
Match the DPA ranges of the mem device and the calcuated DPA range attached to the DSMAS. If a match is found, then assign the QTG ID to the relevant DPA range of the memory device. Signed-off-by: Dave Jiang <dave.jiang@intel.com> --- drivers/cxl/core/mbox.c | 2 ++ drivers/cxl/cxlmem.h | 2 ++ drivers/cxl/port.c | 35 +++++++++++++++++++++++++++++++++++ 3 files changed, 39 insertions(+)