| Message ID | 20230308034036.99213-4-xingyu.wu@starfivetech.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add watchdog driver for StarFive JH7100/JH7110 RISC-V SoCs | expand |
On Wed, 8 Mar 2023 at 04:42, Xingyu Wu <xingyu.wu@starfivetech.com> wrote: > > Add watchdog node for the StarFive JH7100 RISC-V SoC. > > Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> > --- > arch/riscv/boot/dts/starfive/jh7100.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi > index 000447482aca..1eb7c21a94fd 100644 > --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi > +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi > @@ -238,5 +238,15 @@ i2c3: i2c@12460000 { > #size-cells = <0>; > status = "disabled"; > }; > + > + wdog: watchdog@12480000 { I don't see anything referencing this node, so the label can be dropped. With that fixed: Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> > + compatible = "starfive,jh7100-wdt"; > + reg = <0x0 0x12480000 0x0 0x10000>; > + clocks = <&clkgen JH7100_CLK_WDTIMER_APB>, > + <&clkgen JH7100_CLK_WDT_CORE>; > + clock-names = "apb", "core"; > + resets = <&rstgen JH7100_RSTN_WDTIMER_APB>, > + <&rstgen JH7100_RSTN_WDT>; > + }; > }; > }; > -- > 2.25.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
On 2023/3/9 0:09, Emil Renner Berthing wrote: > On Wed, 8 Mar 2023 at 04:42, Xingyu Wu <xingyu.wu@starfivetech.com> wrote: >> >> Add watchdog node for the StarFive JH7100 RISC-V SoC. >> >> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> >> --- >> arch/riscv/boot/dts/starfive/jh7100.dtsi | 10 ++++++++++ >> 1 file changed, 10 insertions(+) >> >> diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi >> index 000447482aca..1eb7c21a94fd 100644 >> --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi >> +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi >> @@ -238,5 +238,15 @@ i2c3: i2c@12460000 { >> #size-cells = <0>; >> status = "disabled"; >> }; >> + >> + wdog: watchdog@12480000 { > > I don't see anything referencing this node, so the label can be dropped. > With that fixed: > Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> > Will drop the label and just use: watchdog@12480000 { Best regards, Xingyu Wu
diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index 000447482aca..1eb7c21a94fd 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -238,5 +238,15 @@ i2c3: i2c@12460000 { #size-cells = <0>; status = "disabled"; }; + + wdog: watchdog@12480000 { + compatible = "starfive,jh7100-wdt"; + reg = <0x0 0x12480000 0x0 0x10000>; + clocks = <&clkgen JH7100_CLK_WDTIMER_APB>, + <&clkgen JH7100_CLK_WDT_CORE>; + clock-names = "apb", "core"; + resets = <&rstgen JH7100_RSTN_WDTIMER_APB>, + <&rstgen JH7100_RSTN_WDT>; + }; }; };
Add watchdog node for the StarFive JH7100 RISC-V SoC. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> --- arch/riscv/boot/dts/starfive/jh7100.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)