diff mbox

[edk2,1/3] Platforms/ARM/Juno: Fix IO window translate offset in PCIe root complex

Message ID 1461078716-21369-1-git-send-email-sudeep.holla@arm.com
State New
Headers show

Commit Message

Sudeep Holla April 19, 2016, 3:11 p.m. UTC
XPress-RICH3 PCIe driver initialises the root complex with the same
source and target address for IO window which makes translate offset 0.

This patch fixes the translate offset for the IO window in Juno PCIe
root complex ACPI table.

Contributed-under: TianoCore Contribution Agreement 1.0
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

---
 Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
1.9.1

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Comments

Ard Biesheuvel April 20, 2016, 7:41 a.m. UTC | #1
On 19 April 2016 at 17:11, Sudeep Holla <sudeep.holla@arm.com> wrote:
> XPress-RICH3 PCIe driver initialises the root complex with the same

> source and target address for IO window which makes translate offset 0.

>

> This patch fixes the translate offset for the IO window in Juno PCIe

> root complex ACPI table.

>

> Contributed-under: TianoCore Contribution Agreement 1.0

> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>

> Cc: Leif Lindholm <leif.lindholm@linaro.org>

> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>


I can't review or test this. Leif, Ryan?

> ---

>  Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl | 2 +-

>  1 file changed, 1 insertion(+), 1 deletion(-)

>

> diff --git a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl

> index 800d2cb3b2fb..ab5041db731a 100644

> --- a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl

> +++ b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl

> @@ -109,7 +109,7 @@ DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM

>                                         0x00000000,                                                     // Granularity

>                                         0x5f800000,                                                     // Min Base Address

>                                         0x5fffffff,                                                     // Max Base Address

> -                                       0x5f800000,                                                     // Translate

> +                                       0x00000000,                                                     // Translate

>                                         0x00800000                                                      // Length

>                                 )

>                         }) // Name(RBUF)

> --

> 1.9.1

>

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Leif Lindholm April 20, 2016, 1:26 p.m. UTC | #2
Jeremy - could you comment on this series?

On 19 April 2016 at 16:11, Sudeep Holla <sudeep.holla@arm.com> wrote:
> XPress-RICH3 PCIe driver initialises the root complex with the same

> source and target address for IO window which makes translate offset 0.

>

> This patch fixes the translate offset for the IO window in Juno PCIe

> root complex ACPI table.

>

> Contributed-under: TianoCore Contribution Agreement 1.0

> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>

> Cc: Leif Lindholm <leif.lindholm@linaro.org>

> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

> ---

>  Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl | 2 +-

>  1 file changed, 1 insertion(+), 1 deletion(-)

>

> diff --git a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl

> index 800d2cb3b2fb..ab5041db731a 100644

> --- a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl

> +++ b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl

> @@ -109,7 +109,7 @@ DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM

>                                         0x00000000,                                                     // Granularity

>                                         0x5f800000,                                                     // Min Base Address

>                                         0x5fffffff,                                                     // Max Base Address

> -                                       0x5f800000,                                                     // Translate

> +                                       0x00000000,                                                     // Translate

>                                         0x00800000                                                      // Length

>                                 )

>                         }) // Name(RBUF)

> --

> 1.9.1

>

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Graeme Gregory April 20, 2016, 1:34 p.m. UTC | #3
On Tue, Apr 19, 2016 at 04:11:54PM +0100, Sudeep Holla wrote:
> XPress-RICH3 PCIe driver initialises the root complex with the same

> source and target address for IO window which makes translate offset 0.

> 

> This patch fixes the translate offset for the IO window in Juno PCIe

> root complex ACPI table.

> 

> Contributed-under: TianoCore Contribution Agreement 1.0

> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>

> Cc: Leif Lindholm <leif.lindholm@linaro.org>

> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

> ---

>  Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl | 2 +-

>  1 file changed, 1 insertion(+), 1 deletion(-)

> 

> diff --git a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl

> index 800d2cb3b2fb..ab5041db731a 100644

> --- a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl

> +++ b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl

> @@ -109,7 +109,7 @@ DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM

>  					0x00000000, 							// Granularity

>  					0x5f800000, 							// Min Base Address

>  					0x5fffffff, 							// Max Base Address

> -					0x5f800000, 							// Translate

> +					0x00000000, 							// Translate

>  					0x00800000  							// Length

>  				)

>  			}) // Name(RBUF)


I suspect the correct form here is

0x00000000, // Granularity
0x00000000, // Min Base Address
0x00ffffff, // Max Base Address
0x5f800000, // Translate
0x00800000, // Length

In my understanding Min/Max are in terms of the IO ports and translation
address is where in physical memory that set of IO ports is mapped.

Thanks

Graeme

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Sudeep Holla April 20, 2016, 1:39 p.m. UTC | #4
On 20/04/16 14:34, Graeme Gregory wrote:
> On Tue, Apr 19, 2016 at 04:11:54PM +0100, Sudeep Holla wrote:

>> XPress-RICH3 PCIe driver initialises the root complex with the same

>> source and target address for IO window which makes translate offset 0.

>>

>> This patch fixes the translate offset for the IO window in Juno PCIe

>> root complex ACPI table.

>>

>> Contributed-under: TianoCore Contribution Agreement 1.0

>> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>

>> Cc: Leif Lindholm <leif.lindholm@linaro.org>

>> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

>> ---

>>   Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl | 2 +-

>>   1 file changed, 1 insertion(+), 1 deletion(-)

>>

>> diff --git a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl

>> index 800d2cb3b2fb..ab5041db731a 100644

>> --- a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl

>> +++ b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl

>> @@ -109,7 +109,7 @@ DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM

>>   					0x00000000, 							// Granularity

>>   					0x5f800000, 							// Min Base Address

>>   					0x5fffffff, 							// Max Base Address

>> -					0x5f800000, 							// Translate

>> +					0x00000000, 							// Translate

>>   					0x00800000  							// Length

>>   				)

>>   			}) // Name(RBUF)

>

> I suspect the correct form here is

>

> 0x00000000, // Granularity

> 0x00000000, // Min Base Address

> 0x00ffffff, // Max Base Address

> 0x5f800000, // Translate

> 0x00800000, // Length

>

> In my understanding Min/Max are in terms of the IO ports and translation

> address is where in physical memory that set of IO ports is mapped.

>


Yes that makes sense. I recall now that I wanted to check what you are 
suggesting above after reading some private discussion on this. I never 
got around that and totally forgot.

I will give it a try. Thanks for reminding me.

-- 
Regards,
Sudeep
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diff mbox

Patch

diff --git a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl
index 800d2cb3b2fb..ab5041db731a 100644
--- a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl
+++ b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl
@@ -109,7 +109,7 @@  DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM
 					0x00000000, 							// Granularity
 					0x5f800000, 							// Min Base Address
 					0x5fffffff, 							// Max Base Address
-					0x5f800000, 							// Translate
+					0x00000000, 							// Translate
 					0x00800000  							// Length
 				)
 			}) // Name(RBUF)