| Message ID | 20230327134734.3256974-4-abel.vesa@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | [v4,1/7] dt-bindings: crypto: Add Qualcomm Inline Crypto Engine | expand |
diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml index c5a06c048389..7384300c421d 100644 --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml @@ -70,6 +70,10 @@ properties: power-domains: maxItems: 1 + qcom,ice: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to the Inline Crypto Engine node + reg: minItems: 1 maxItems: 2
Starting with SM8550, the ICE will have its own devicetree node so add the qcom,ice property to reference it. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- The v3 (RFC) is here: https://lore.kernel.org/all/20230313115202.3960700-4-abel.vesa@linaro.org/ Changes since v3: * dropped the "and drop core clock" part from subject line Changes since v2: * dropped all changes except the qcom,ice property Documentation/devicetree/bindings/ufs/qcom,ufs.yaml | 4 ++++ 1 file changed, 4 insertions(+)