diff mbox series

[v2,02/17] arm64: dts: mediatek: mt6795: Add apmixedsys syscon node

Message ID 20230327083647.22017-3-angelogioacchino.delregno@collabora.com
State New
Headers show
Series MT6795 Helio X10 and Sony Xperia M5: DT step 2! | expand

Commit Message

AngeloGioacchino Del Regno March 27, 2023, 8:36 a.m. UTC
Add the APMIXEDSYS node, providing a syscon to the APMIXED iospace and
also providing PLLs.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt6795.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Matthias Brugger April 2, 2023, 5:08 p.m. UTC | #1
On 27/03/2023 10:36, AngeloGioacchino Del Regno wrote:
> Add the APMIXEDSYS node, providing a syscon to the APMIXED iospace and
> also providing PLLs.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
>   arch/arm64/boot/dts/mediatek/mt6795.dtsi | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
> index 4d2119751572..26d640e1bfb6 100644
> --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
> @@ -310,6 +310,12 @@ systimer: timer@10200670 {
>   			clock-names = "clk13m";
>   		};
>   
> +		apmixedsys: syscon@10209000 {
> +			compatible = "mediatek,mt6795-apmixedsys", "syscon";

Looks good although we have the compatible twice, in 
bindings/clock/mediatek,apmixedsys.yaml and 
bindings/clock/mediatek,mt6795-sys-clock.yaml

So we should see if we can merge both.

Matthias

> +			reg = <0 0x10209000 0 0x1000>;
> +			#clock-cells = <1>;
> +		};
> +
>   		fhctl: clock-controller@10209f00 {
>   			compatible = "mediatek,mt6795-fhctl";
>   			reg = <0 0x10209f00 0 0x100>;
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
index 4d2119751572..26d640e1bfb6 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
@@ -310,6 +310,12 @@  systimer: timer@10200670 {
 			clock-names = "clk13m";
 		};
 
+		apmixedsys: syscon@10209000 {
+			compatible = "mediatek,mt6795-apmixedsys", "syscon";
+			reg = <0 0x10209000 0 0x1000>;
+			#clock-cells = <1>;
+		};
+
 		fhctl: clock-controller@10209f00 {
 			compatible = "mediatek,mt6795-fhctl";
 			reg = <0 0x10209f00 0 0x100>;