diff mbox series

[RFC,5/5] drm/msm/dsi: Use MSM and DRM DSC helper methods

Message ID 20230329-rfc-msm-dsc-helper-v1-5-f3e479f59b6d@quicinc.com
State New
Headers show
Series Introduce MSM-specific DSC helpers | expand

Commit Message

Jessica Zhang March 29, 2023, 11:18 p.m. UTC
Use MSM and DRM DSC helper methods.

Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
---
 drivers/gpu/drm/msm/dsi/dsi_host.c | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 74d38f90398a..7419fe58a941 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -31,6 +31,7 @@ 
 #include "msm_kms.h"
 #include "msm_gem.h"
 #include "phy/dsi_phy.h"
+#include "disp/msm_dsc_helper.h"
 
 #define DSI_RESET_TOGGLE_DELAY_MS 20
 
@@ -841,14 +842,14 @@  static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod
 {
 	struct drm_dsc_config *dsc = msm_host->dsc;
 	u32 reg, reg_ctrl, reg_ctrl2;
-	u32 slice_per_intf, total_bytes_per_intf;
+	u32 slice_per_intf;
 	u32 pkt_per_line;
 	u32 eol_byte_num;
 
 	/* first calculate dsc parameters and then program
 	 * compress mode registers
 	 */
-	slice_per_intf = DIV_ROUND_UP(hdisplay, dsc->slice_width);
+	slice_per_intf = msm_dsc_get_slice_per_intf(dsc, hdisplay);
 
 	/*
 	 * If slice_count is greater than slice_per_intf
@@ -858,10 +859,10 @@  static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod
 	if (dsc->slice_count > slice_per_intf)
 		dsc->slice_count = 1;
 
-	total_bytes_per_intf = dsc->slice_chunk_size * slice_per_intf;
+	eol_byte_num = msm_dsc_get_eol_byte_num(msm_host->dsc, hdisplay,
+			dsi_get_bpp(msm_host->format));
 
-	eol_byte_num = total_bytes_per_intf % 3;
-	pkt_per_line = slice_per_intf / dsc->slice_count;
+	pkt_per_line = slice_per_intf / MSM_DSC_SLICE_PER_PKT;
 
 	if (is_cmd_mode) /* packet data type */
 		reg = DSI_COMMAND_COMPRESSION_MODE_CTRL_STREAM0_DATATYPE(MIPI_DSI_DCS_LONG_WRITE);
@@ -911,6 +912,11 @@  static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
 
 	DBG("");
 
+	if (msm_host->mode_flags & MIPI_DSI_MODE_VIDEO)
+		/* Default widebus_en to false for now. */
+		hdisplay = msm_dsc_get_pclk_per_line(msm_host->dsc, mode->hdisplay,
+				dsi_get_bpp(msm_host->format));
+
 	/*
 	 * For bonded DSI mode, the current DRM mode has
 	 * the complete width of the panel. Since, the complete
@@ -1759,7 +1765,7 @@  static int dsi_populate_dsc_params(struct msm_dsi_host *msm_host, struct drm_dsc
 		return ret;
 	}
 
-	dsc->initial_scale_value = 32;
+	dsc->initial_scale_value = drm_dsc_calculate_initial_scale_value(dsc);
 	dsc->line_buf_depth = dsc->bits_per_component + 1;
 
 	return drm_dsc_compute_rc_parameters(dsc);