@@ -70,20 +70,16 @@ [PcdsFixedAtBuild]
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16
## This flag is used to control the destination port for PlatformDebugLibIoPort
gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4
- ## This flag determines the Power Management Base Address of choice, written
- # to PIIX4 function 3 offset 0x40-0x43 bits [15:6].
- gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress|0xB000|UINT16|5
-
## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and
# LUNs are retrieved from the host during virtio-scsi setup.
# MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun
# possible devices. This can take extremely long, for example with
# MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit
# MaxTarget and MaxLun, independently, should the host report higher values,
# so that scanning the number of devices given by their product is still
# acceptably fast.
@@ -26,15 +26,12 @@ [Defines]
[Sources]
AcpiTimerLib.c
BaseAcpiTimerLib.c
[Packages]
MdePkg/MdePkg.dec
OvmfPkg/OvmfPkg.dec
-[Pcd]
- gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress
-
[LibraryClasses]
BaseLib
PciLib
IoLib
@@ -25,15 +25,12 @@ [Defines]
[Sources]
AcpiTimerLib.c
BaseRomAcpiTimerLib.c
[Packages]
MdePkg/MdePkg.dec
OvmfPkg/OvmfPkg.dec
-[Pcd]
- gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress
-
[LibraryClasses]
BaseLib
PciLib
IoLib
@@ -32,11 +32,8 @@ [Sources]
[Packages]
MdePkg/MdePkg.dec
OvmfPkg/OvmfPkg.dec
[LibraryClasses]
DebugLib
IoLib
TimerLib
-
-[Pcd]
- gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress
\ No newline at end of file
@@ -60,17 +60,16 @@ [LibraryClasses]
MtrrLib
PcdLib
[Pcd]
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize
- gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress
gUefiOvmfPkgTokenSpaceGuid.PcdS3AcpiReservedMemoryBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize
gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
@@ -23,16 +23,21 @@
//
// OVMF Host Bridge DID Address
//
#define OVMF_HOSTBRIDGE_DID \
PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)
//
+// Values we program into the PM base address registers
+//
+#define PIIX4_PMBA_VALUE 0xB000
+
+//
// Common bits in same-purpose registers
//
#define PMBA_RTE BIT0
//
// Common IO ports relative to the Power Management Base Address
//
#define ACPI_TIMER_OFFSET 0x8
@@ -10,17 +10,16 @@
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/PciLib.h>
-#include <Library/PcdLib.h>
#include <OvmfPlatforms.h>
//
// Cached ACPI Timer IO Address
//
STATIC UINT32 mAcpiTimerIoAddr;
/**
@@ -64,19 +63,19 @@ AcpiTimerLibConstructor (
}
//
// Check to see if the Power Management Base Address is already enabled
//
if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
//
// If the Power Management Base Address is not programmed,
- // then program the Power Management Base Address from a PCD.
+ // then program it now.
//
- PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PcdGet16 (PcdAcpiPmBaseAddress));
+ PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PIIX4_PMBA_VALUE);
//
// Enable PMBA I/O port decodes
//
PciOr8 (AcpiCtlReg, AcpiEnBit);
}
mAcpiTimerIoAddr = (PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET;
@@ -11,17 +11,16 @@
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/PciLib.h>
-#include <Library/PcdLib.h>
#include <OvmfPlatforms.h>
/**
The constructor function enables ACPI IO space.
If ACPI I/O space not enabled, this function will enable it.
It will always return RETURN_SUCCESS.
@@ -62,19 +61,19 @@ AcpiTimerLibConstructor (
}
//
// Check to see if the Power Management Base Address is already enabled
//
if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
//
// If the Power Management Base Address is not programmed,
- // then program the Power Management Base Address from a PCD.
+ // then program it now.
//
- PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PcdGet16 (PcdAcpiPmBaseAddress));
+ PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PIIX4_PMBA_VALUE);
//
// Enable PMBA I/O port decodes
//
PciOr8 (AcpiCtlReg, AcpiEnBit);
}
return RETURN_SUCCESS;
@@ -12,28 +12,29 @@
**/
#include <Base.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
-#include <Library/PcdLib.h>
#include <Library/TimerLib.h>
+#include <OvmfPlatforms.h>
+
VOID
AcpiPmControl (
UINTN SuspendType
)
{
ASSERT (SuspendType < 6);
- IoBitFieldWrite16 (PcdGet16 (PcdAcpiPmBaseAddress) + 4, 10, 13, (UINT16) SuspendType);
- IoOr16 (PcdGet16 (PcdAcpiPmBaseAddress) + 4, BIT13);
+ IoBitFieldWrite16 (PIIX4_PMBA_VALUE + 4, 10, 13, (UINT16) SuspendType);
+ IoOr16 (PIIX4_PMBA_VALUE + 4, BIT13);
CpuDeadLoop ();
}
/**
Calling this function causes a system-wide reset. This sets
all circuitry within the system to its initial state. This type of reset
is asynchronous to system operation and operates without regard to
cycle boundaries.
@@ -407,17 +407,17 @@ MiscInitialization (
// has been configured (e.g., by Xen) and skip the setup here.
// This matches the logic in AcpiTimerLibConstructor ().
//
if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
//
// The PEI phase should be exited with fully accessibe ACPI PM IO space:
// 1. set PMBA
//
- PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PcdGet16 (PcdAcpiPmBaseAddress));
+ PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PIIX4_PMBA_VALUE);
//
// 2. set PCICMD/IOSE
//
PciOr8 (PmCmd, EFI_PCI_COMMAND_IO_SPACE);
//
// 3. set ACPI PM IO enable bit (PMREGMISC:PMIOSE or ACPI_CNTL:ACPI_EN)
In the next patches, we'll differentiate the PMBA IO port address that we program on PIIX4 vs. Q35. Normally we'd just turn PcdAcpiPmBaseAddress into a dynamic PCD. However, because we need this value in BaseRomAcpiTimerLib too (which cannot access RAM and dynamic PCDs), it must remain a build time constant. We will introduce its Q35 counterpart later. As first step, replace the PCD with a new macro in "OvmfPlatforms.h"; Jordan prefers the latter to fixed PCDs in this instance. Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> --- Notes: v2: - use macro instead of fixed PcdPiix4AcpiPmBaseAddress [Jordan] - update the comments in "BaseAcpiTimerLib.c" and "BaseRomAcpiTimerLib.c" in this patch (since the PCD is going away in this patch) rather than in patch #4 OvmfPkg/OvmfPkg.dec | 4 ---- OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf | 3 --- OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.inf | 3 --- OvmfPkg/Library/ResetSystemLib/ResetSystemLib.inf | 3 --- OvmfPkg/PlatformPei/PlatformPei.inf | 1 - OvmfPkg/Include/OvmfPlatforms.h | 5 +++++ OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c | 5 ++--- OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c | 5 ++--- OvmfPkg/Library/ResetSystemLib/ResetSystemLib.c | 7 ++++--- OvmfPkg/PlatformPei/Platform.c | 2 +- 10 files changed, 14 insertions(+), 24 deletions(-) -- 1.8.3.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel