| Message ID | 20230526070421.25406-3-quic_kathirav@quicinc.com |
|---|---|
| State | Accepted |
| Commit | 2f34a2aa4c88f4882e3c5df8c9b78f8bbd3f564f |
| Headers | show |
| Series | Add QFPROM support for few IPQ SoCs | expand |
On 26.05.2023 09:04, Kathiravan T wrote: > IPQ5332 has efuse region to determine the various HW quirks. Lets > add the initial support and the individual fuses will be added as they > are required. > > Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> > --- > arch/arm64/boot/dts/qcom/ipq5332.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi > index af4d97143bcf..c2d6cc65a323 100644 > --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi > @@ -135,6 +135,13 @@ > #size-cells = <1>; > ranges = <0 0 0 0xffffffff>; > > + qfprom: efuse@a4000 { > + compatible = "qcom,ipq5332-qfprom", "qcom,qfprom"; > + reg = <0x000a4000 0x721>; That's an odd size. Are you sure this is how long the corrected region is? Konrad > + #address-cells = <1>; > + #size-cells = <1>; > + }; > + > rng: rng@e3000 { > compatible = "qcom,prng-ee"; > reg = <0x000e3000 0x1000>;
On 26.05.2023 12:24, Kathiravan T wrote: > > On 5/26/2023 2:49 PM, Konrad Dybcio wrote: >> >> On 26.05.2023 09:04, Kathiravan T wrote: >>> IPQ5332 has efuse region to determine the various HW quirks. Lets >>> add the initial support and the individual fuses will be added as they >>> are required. >>> >>> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> >>> --- >>> arch/arm64/boot/dts/qcom/ipq5332.dtsi | 7 +++++++ >>> 1 file changed, 7 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi >>> index af4d97143bcf..c2d6cc65a323 100644 >>> --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi >>> @@ -135,6 +135,13 @@ >>> #size-cells = <1>; >>> ranges = <0 0 0 0xffffffff>; >>> + qfprom: efuse@a4000 { >>> + compatible = "qcom,ipq5332-qfprom", "qcom,qfprom"; >>> + reg = <0x000a4000 0x721>; >> That's an odd size. Are you sure this is how long the corrected region is? > > > Yes, As per the HW document, this is the size. OK thanks for confirming Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > > >> >> Konrad >>> + #address-cells = <1>; >>> + #size-cells = <1>; >>> + }; >>> + >>> rng: rng@e3000 { >>> compatible = "qcom,prng-ee"; >>> reg = <0x000e3000 0x1000>;
diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index af4d97143bcf..c2d6cc65a323 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -135,6 +135,13 @@ #size-cells = <1>; ranges = <0 0 0 0xffffffff>; + qfprom: efuse@a4000 { + compatible = "qcom,ipq5332-qfprom", "qcom,qfprom"; + reg = <0x000a4000 0x721>; + #address-cells = <1>; + #size-cells = <1>; + }; + rng: rng@e3000 { compatible = "qcom,prng-ee"; reg = <0x000e3000 0x1000>;
IPQ5332 has efuse region to determine the various HW quirks. Lets add the initial support and the individual fuses will be added as they are required. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> --- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)