| Message ID | 20230615-viper-stoic-1ff8efd7d51d@spud |
|---|---|
| State | New |
| Headers | show |
| Series | dt-bindings: riscv: cpus: switch to unevaluatedProperties: false | expand |
On Thu, 15 Jun 2023 23:50:15 +0100, Conor Dooley wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > To permit validation of cpu nodes, swap "additionalProperties: true" > out for "unevaluatedProperties: false". > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > Documentation/devicetree/bindings/riscv/cpus.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index e89a10d9c06b..144da86718c1 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -143,7 +143,7 @@ required: - riscv,isa - interrupt-controller -additionalProperties: true +unevaluatedProperties: false examples: - |