| Message ID | 20230627-msm8974-sort-v1-2-75c5800a2e09@z3ntu.xyz |
|---|---|
| State | Accepted |
| Commit | 4960e06d386ecc5307bc2e66a77d5f06df1e2a6f |
| Headers | show |
| Series | Small style fixes in msm8974.dtsi | expand |
On 27.06.2023 21:45, Luca Weiss wrote: > Some nodes weren't sorted by reg, so fix that now. Now all nodes inside > /soc should be sorted correctly. > > Signed-off-by: Luca Weiss <luca@z3ntu.xyz> > --- might conflict with Dmitry's SAW/SPM changes https://lore.kernel.org/linux-arm-msm/20230625202547.174647-1-dmitry.baryshkov@linaro.org/T/#maf3c226ca76f1dee37464c465c2429d9bb1dcbb3 still Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 70 ++++++++++++++++---------------- > 1 file changed, 35 insertions(+), 35 deletions(-) > > diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi > index c6475837eda3..9aa8f9a273a8 100644 > --- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi > +++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi > @@ -334,6 +334,12 @@ apcs: syscon@f9011000 { > reg = <0xf9011000 0x1000>; > }; > > + saw_l2: power-controller@f9012000 { > + compatible = "qcom,saw2"; > + reg = <0xf9012000 0x1000>; > + regulator; > + }; > + > timer@f9020000 { > #address-cells = <1>; > #size-cells = <1>; > @@ -393,52 +399,46 @@ frame@f9028000 { > }; > }; > > - saw0: power-controller@f9089000 { > - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; > - reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>; > - }; > - > - saw1: power-controller@f9099000 { > - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; > - reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>; > - }; > - > - saw2: power-controller@f90a9000 { > - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; > - reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>; > - }; > - > - saw3: power-controller@f90b9000 { > - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; > - reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>; > - }; > - > - saw_l2: power-controller@f9012000 { > - compatible = "qcom,saw2"; > - reg = <0xf9012000 0x1000>; > - regulator; > - }; > - > acc0: power-manager@f9088000 { > compatible = "qcom,kpss-acc-v2"; > reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>; > }; > > + saw0: power-controller@f9089000 { > + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; > + reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>; > + }; > + > acc1: power-manager@f9098000 { > compatible = "qcom,kpss-acc-v2"; > reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>; > }; > > + saw1: power-controller@f9099000 { > + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; > + reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>; > + }; > + > acc2: power-manager@f90a8000 { > compatible = "qcom,kpss-acc-v2"; > reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>; > }; > > + saw2: power-controller@f90a9000 { > + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; > + reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>; > + }; > + > acc3: power-manager@f90b8000 { > compatible = "qcom,kpss-acc-v2"; > reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>; > }; > > + saw3: power-controller@f90b9000 { > + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; > + reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>; > + }; > + > sdhc_1: mmc@f9824900 { > compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"; > reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; > @@ -1051,6 +1051,15 @@ kpss_out: endpoint { > }; > }; > > + bimc: interconnect@fc380000 { > + reg = <0xfc380000 0x6a000>; > + compatible = "qcom,msm8974-bimc"; > + #interconnect-cells = <1>; > + clock-names = "bus", "bus_a"; > + clocks = <&rpmcc RPM_SMD_BIMC_CLK>, > + <&rpmcc RPM_SMD_BIMC_A_CLK>; > + }; > + > gcc: clock-controller@fc400000 { > compatible = "qcom,gcc-msm8974"; > #clock-cells = <1>; > @@ -1069,15 +1078,6 @@ rpm_msg_ram: sram@fc428000 { > reg = <0xfc428000 0x4000>; > }; > > - bimc: interconnect@fc380000 { > - reg = <0xfc380000 0x6a000>; > - compatible = "qcom,msm8974-bimc"; > - #interconnect-cells = <1>; > - clock-names = "bus", "bus_a"; > - clocks = <&rpmcc RPM_SMD_BIMC_CLK>, > - <&rpmcc RPM_SMD_BIMC_A_CLK>; > - }; > - > snoc: interconnect@fc460000 { > reg = <0xfc460000 0x4000>; > compatible = "qcom,msm8974-snoc"; >
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi index c6475837eda3..9aa8f9a273a8 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi @@ -334,6 +334,12 @@ apcs: syscon@f9011000 { reg = <0xf9011000 0x1000>; }; + saw_l2: power-controller@f9012000 { + compatible = "qcom,saw2"; + reg = <0xf9012000 0x1000>; + regulator; + }; + timer@f9020000 { #address-cells = <1>; #size-cells = <1>; @@ -393,52 +399,46 @@ frame@f9028000 { }; }; - saw0: power-controller@f9089000 { - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; - reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>; - }; - - saw1: power-controller@f9099000 { - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; - reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>; - }; - - saw2: power-controller@f90a9000 { - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; - reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>; - }; - - saw3: power-controller@f90b9000 { - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; - reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>; - }; - - saw_l2: power-controller@f9012000 { - compatible = "qcom,saw2"; - reg = <0xf9012000 0x1000>; - regulator; - }; - acc0: power-manager@f9088000 { compatible = "qcom,kpss-acc-v2"; reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>; }; + saw0: power-controller@f9089000 { + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; + reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>; + }; + acc1: power-manager@f9098000 { compatible = "qcom,kpss-acc-v2"; reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>; }; + saw1: power-controller@f9099000 { + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; + reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>; + }; + acc2: power-manager@f90a8000 { compatible = "qcom,kpss-acc-v2"; reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>; }; + saw2: power-controller@f90a9000 { + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; + reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>; + }; + acc3: power-manager@f90b8000 { compatible = "qcom,kpss-acc-v2"; reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>; }; + saw3: power-controller@f90b9000 { + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; + reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>; + }; + sdhc_1: mmc@f9824900 { compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; @@ -1051,6 +1051,15 @@ kpss_out: endpoint { }; }; + bimc: interconnect@fc380000 { + reg = <0xfc380000 0x6a000>; + compatible = "qcom,msm8974-bimc"; + #interconnect-cells = <1>; + clock-names = "bus", "bus_a"; + clocks = <&rpmcc RPM_SMD_BIMC_CLK>, + <&rpmcc RPM_SMD_BIMC_A_CLK>; + }; + gcc: clock-controller@fc400000 { compatible = "qcom,gcc-msm8974"; #clock-cells = <1>; @@ -1069,15 +1078,6 @@ rpm_msg_ram: sram@fc428000 { reg = <0xfc428000 0x4000>; }; - bimc: interconnect@fc380000 { - reg = <0xfc380000 0x6a000>; - compatible = "qcom,msm8974-bimc"; - #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; - clocks = <&rpmcc RPM_SMD_BIMC_CLK>, - <&rpmcc RPM_SMD_BIMC_A_CLK>; - }; - snoc: interconnect@fc460000 { reg = <0xfc460000 0x4000>; compatible = "qcom,msm8974-snoc";
Some nodes weren't sorted by reg, so fix that now. Now all nodes inside /soc should be sorted correctly. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> --- arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 70 ++++++++++++++++---------------- 1 file changed, 35 insertions(+), 35 deletions(-)