Message ID | 20230704-topic-8250_pcie_dmac-v1-2-799603a980b0@linaro.org |
---|---|
State | New |
Headers | show |
Series | 8250 dma-coherent | expand |
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 1af0eed9eef5..ccc38c205de3 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2729,6 +2729,7 @@ adreno_smmu: iommu@3da0000 { clock-names = "ahb", "bus", "iface"; power-domains = <&gpucc GPU_CX_GDSC>; + dma-coherent; }; slpi: remoteproc@5c00000 { @@ -5399,6 +5400,7 @@ apps_smmu: iommu@15000000 { <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>; + dma-coherent; }; adsp: remoteproc@17300000 {
The SMMUs on SM8250 are cache-coherent. Mark them as such. Fixes: a89441fcd09d ("arm64: dts: qcom: sm8250: add apps_smmu node") Fixes: 04a3605b184e ("arm64: dts: qcom: add sm8250 GPU nodes") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 ++ 1 file changed, 2 insertions(+)