| Message ID | 20230705205954.4159781-1-Frank.Li@nxp.com |
|---|---|
| State | Accepted |
| Commit | ba345b77fae7054d0cbd033283c47033e45db6d8 |
| Headers | show |
| Series | [1/1] arm64: dts: imx8mp: remove arm,primecell-periphid at etm nodes | expand |
Hi Frank, Am Mittwoch, 5. Juli 2023, 22:59:53 CEST schrieb Frank Li: > The reg size of etm nodes is incorrectly set to 64k instead of 4k. This > leads to a crash when calling amba_read_periphid(). After corrected reg > size, amba_read_periphid() retrieve the correct periphid. > arm,primecell-periphid were removed from the etm nodes. So this means the reference manual is wrong here? It clearly states the size is 64kiB. Reference Manual i.MX8MP Rev 1. 06/2021 On a side note: Is imx8mq affected by this as well? The DAP memory table lists similar sizes in the RM . Best regards, Alexander > Signed-off-by: Frank Li <Frank.Li@nxp.com> > --- > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++-------- > 1 file changed, 4 insertions(+), 8 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index > cc406bb338fe..e0ca82ff6f15 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -306,8 +306,7 @@ soc: soc@0 { > > etm0: etm@28440000 { > compatible = "arm,coresight-etm4x", "arm,primecell"; > - reg = <0x28440000 0x10000>; > - arm,primecell-periphid = <0xbb95d>; > + reg = <0x28440000 0x1000>; > cpu = <&A53_0>; > clocks = <&clk IMX8MP_CLK_MAIN_AXI>; > clock-names = "apb_pclk"; > @@ -323,8 +322,7 @@ etm0_out_port: endpoint { > > etm1: etm@28540000 { > compatible = "arm,coresight-etm4x", "arm,primecell"; > - reg = <0x28540000 0x10000>; > - arm,primecell-periphid = <0xbb95d>; > + reg = <0x28540000 0x1000>; > cpu = <&A53_1>; > clocks = <&clk IMX8MP_CLK_MAIN_AXI>; > clock-names = "apb_pclk"; > @@ -340,8 +338,7 @@ etm1_out_port: endpoint { > > etm2: etm@28640000 { > compatible = "arm,coresight-etm4x", "arm,primecell"; > - reg = <0x28640000 0x10000>; > - arm,primecell-periphid = <0xbb95d>; > + reg = <0x28640000 0x1000>; > cpu = <&A53_2>; > clocks = <&clk IMX8MP_CLK_MAIN_AXI>; > clock-names = "apb_pclk"; > @@ -357,8 +354,7 @@ etm2_out_port: endpoint { > > etm3: etm@28740000 { > compatible = "arm,coresight-etm4x", "arm,primecell"; > - reg = <0x28740000 0x10000>; > - arm,primecell-periphid = <0xbb95d>; > + reg = <0x28740000 0x1000>; > cpu = <&A53_3>; > clocks = <&clk IMX8MP_CLK_MAIN_AXI>; > clock-names = "apb_pclk";
Hi Alexander, Am Donnerstag, dem 06.07.2023 um 07:06 +0200 schrieb Alexander Stein: > Hi Frank, > > Am Mittwoch, 5. Juli 2023, 22:59:53 CEST schrieb Frank Li: > > The reg size of etm nodes is incorrectly set to 64k instead of 4k. This > > leads to a crash when calling amba_read_periphid(). After corrected reg > > size, amba_read_periphid() retrieve the correct periphid. > > arm,primecell-periphid were removed from the etm nodes. > > So this means the reference manual is wrong here? It clearly states the size > is 64kiB. Reference Manual i.MX8MP Rev 1. 06/2021 > On a side note: Is imx8mq affected by this as well? The DAP memory table lists > similar sizes in the RM . > Note that the 64K MMIO space per device is really an alignment thing. It's a recommendation from ARM to allow individual device MMIO regions to be mapped on kernels with 64K page size. Most of the time the real MMIO space occupied by the device is actually much smaller than 64K. Regards, Lucas > Best regards, > Alexander > > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > > --- > > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++-------- > > 1 file changed, 4 insertions(+), 8 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index > > cc406bb338fe..e0ca82ff6f15 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > @@ -306,8 +306,7 @@ soc: soc@0 { > > > > etm0: etm@28440000 { > > compatible = "arm,coresight-etm4x", > "arm,primecell"; > > - reg = <0x28440000 0x10000>; > > - arm,primecell-periphid = <0xbb95d>; > > + reg = <0x28440000 0x1000>; > > cpu = <&A53_0>; > > clocks = <&clk IMX8MP_CLK_MAIN_AXI>; > > clock-names = "apb_pclk"; > > @@ -323,8 +322,7 @@ etm0_out_port: endpoint { > > > > etm1: etm@28540000 { > > compatible = "arm,coresight-etm4x", > "arm,primecell"; > > - reg = <0x28540000 0x10000>; > > - arm,primecell-periphid = <0xbb95d>; > > + reg = <0x28540000 0x1000>; > > cpu = <&A53_1>; > > clocks = <&clk IMX8MP_CLK_MAIN_AXI>; > > clock-names = "apb_pclk"; > > @@ -340,8 +338,7 @@ etm1_out_port: endpoint { > > > > etm2: etm@28640000 { > > compatible = "arm,coresight-etm4x", > "arm,primecell"; > > - reg = <0x28640000 0x10000>; > > - arm,primecell-periphid = <0xbb95d>; > > + reg = <0x28640000 0x1000>; > > cpu = <&A53_2>; > > clocks = <&clk IMX8MP_CLK_MAIN_AXI>; > > clock-names = "apb_pclk"; > > @@ -357,8 +354,7 @@ etm2_out_port: endpoint { > > > > etm3: etm@28740000 { > > compatible = "arm,coresight-etm4x", > "arm,primecell"; > > - reg = <0x28740000 0x10000>; > > - arm,primecell-periphid = <0xbb95d>; > > + reg = <0x28740000 0x1000>; > > cpu = <&A53_3>; > > clocks = <&clk IMX8MP_CLK_MAIN_AXI>; > > clock-names = "apb_pclk"; > >
On 2023-07-06 09:23, Lucas Stach wrote: > Hi Alexander, > > Am Donnerstag, dem 06.07.2023 um 07:06 +0200 schrieb Alexander Stein: >> Hi Frank, >> >> Am Mittwoch, 5. Juli 2023, 22:59:53 CEST schrieb Frank Li: >>> The reg size of etm nodes is incorrectly set to 64k instead of 4k. This >>> leads to a crash when calling amba_read_periphid(). After corrected reg >>> size, amba_read_periphid() retrieve the correct periphid. >>> arm,primecell-periphid were removed from the etm nodes. >> >> So this means the reference manual is wrong here? It clearly states the size >> is 64kiB. Reference Manual i.MX8MP Rev 1. 06/2021 >> On a side note: Is imx8mq affected by this as well? The DAP memory table lists >> similar sizes in the RM . >> > Note that the 64K MMIO space per device is really an alignment thing. > It's a recommendation from ARM to allow individual device MMIO regions > to be mapped on kernels with 64K page size. Most of the time the real > MMIO space occupied by the device is actually much smaller than 64K. Indeed, it's quite common for TRM memory maps to be written in terms of the interconnect configuration, i.e. from the point of view of the interconnect itself, that whole range of address space is assigned to that peripheral, and it may even be true that the entire range is routed to the port where that peripheral is connected. However what's of more interest for DT is how much of that range the peripheral itself actually decodes. Robin. > > Regards, > Lucas > >> Best regards, >> Alexander >> >>> Signed-off-by: Frank Li <Frank.Li@nxp.com> >>> --- >>> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++-------- >>> 1 file changed, 4 insertions(+), 8 deletions(-) >>> >>> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi >>> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index >>> cc406bb338fe..e0ca82ff6f15 100644 >>> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi >>> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi >>> @@ -306,8 +306,7 @@ soc: soc@0 { >>> >>> etm0: etm@28440000 { >>> compatible = "arm,coresight-etm4x", >> "arm,primecell"; >>> - reg = <0x28440000 0x10000>; >>> - arm,primecell-periphid = <0xbb95d>; >>> + reg = <0x28440000 0x1000>; >>> cpu = <&A53_0>; >>> clocks = <&clk IMX8MP_CLK_MAIN_AXI>; >>> clock-names = "apb_pclk"; >>> @@ -323,8 +322,7 @@ etm0_out_port: endpoint { >>> >>> etm1: etm@28540000 { >>> compatible = "arm,coresight-etm4x", >> "arm,primecell"; >>> - reg = <0x28540000 0x10000>; >>> - arm,primecell-periphid = <0xbb95d>; >>> + reg = <0x28540000 0x1000>; >>> cpu = <&A53_1>; >>> clocks = <&clk IMX8MP_CLK_MAIN_AXI>; >>> clock-names = "apb_pclk"; >>> @@ -340,8 +338,7 @@ etm1_out_port: endpoint { >>> >>> etm2: etm@28640000 { >>> compatible = "arm,coresight-etm4x", >> "arm,primecell"; >>> - reg = <0x28640000 0x10000>; >>> - arm,primecell-periphid = <0xbb95d>; >>> + reg = <0x28640000 0x1000>; >>> cpu = <&A53_2>; >>> clocks = <&clk IMX8MP_CLK_MAIN_AXI>; >>> clock-names = "apb_pclk"; >>> @@ -357,8 +354,7 @@ etm2_out_port: endpoint { >>> >>> etm3: etm@28740000 { >>> compatible = "arm,coresight-etm4x", >> "arm,primecell"; >>> - reg = <0x28740000 0x10000>; >>> - arm,primecell-periphid = <0xbb95d>; >>> + reg = <0x28740000 0x1000>; >>> cpu = <&A53_3>; >>> clocks = <&clk IMX8MP_CLK_MAIN_AXI>; >>> clock-names = "apb_pclk"; >> >> > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On Thu, Jul 06, 2023 at 12:06:19PM +0100, Robin Murphy wrote: > > > > > > Am Mittwoch, 5. Juli 2023, 22:59:53 CEST schrieb Frank Li: > > > > The reg size of etm nodes is incorrectly set to 64k instead of 4k. This > > > > leads to a crash when calling amba_read_periphid(). After corrected reg > > > > size, amba_read_periphid() retrieve the correct periphid. > > > > arm,primecell-periphid were removed from the etm nodes. > > > > > > So this means the reference manual is wrong here? It clearly states the size > > > is 64kiB. Reference Manual i.MX8MP Rev 1. 06/2021 > > > On a side note: Is imx8mq affected by this as well? The DAP memory table lists > > > similar sizes in the RM . > > > > > Note that the 64K MMIO space per device is really an alignment thing. > > It's a recommendation from ARM to allow individual device MMIO regions > > to be mapped on kernels with 64K page size. Most of the time the real > > MMIO space occupied by the device is actually much smaller than 64K. > > Indeed, it's quite common for TRM memory maps to be written in terms of the > interconnect configuration, i.e. from the point of view of the interconnect > itself, that whole range of address space is assigned to that peripheral, > and it may even be true that the entire range is routed to the port where > that peripheral is connected. However what's of more interest for DT is how > much of that range the peripheral itself actually decodes. Yes, there are not problem by mapping bigger space in most case. amba bus's periphal use close to end of region to show device's identical information. In drivers/amba/bus.c, amba_read_periphid() { ... size = resource_size(&dev->res); ... for (pid = 0, i = 0; i < 4; i++) pid |= (readl(tmp + size - 0x20 + 4 * i) & 255) << (i * 8); } So the range in DTS for arm,primecell should be actual IP address space. > > Robin. > > > > > _______________________________________________ > > linux-arm-kernel mailing list > > linux-arm-kernel@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Hi Frank, Am Donnerstag, 6. Juli 2023, 16:39:07 CEST schrieb Frank Li: > On Thu, Jul 06, 2023 at 12:06:19PM +0100, Robin Murphy wrote: > > > > Am Mittwoch, 5. Juli 2023, 22:59:53 CEST schrieb Frank Li: > > > > > The reg size of etm nodes is incorrectly set to 64k instead of 4k. > > > > > This > > > > > leads to a crash when calling amba_read_periphid(). After corrected > > > > > reg > > > > > size, amba_read_periphid() retrieve the correct periphid. > > > > > arm,primecell-periphid were removed from the etm nodes. > > > > > > > > So this means the reference manual is wrong here? It clearly states > > > > the size is 64kiB. Reference Manual i.MX8MP Rev 1. 06/2021 > > > > On a side note: Is imx8mq affected by this as well? The DAP memory > > > > table lists similar sizes in the RM . > > > > > > Note that the 64K MMIO space per device is really an alignment thing. > > > It's a recommendation from ARM to allow individual device MMIO regions > > > to be mapped on kernels with 64K page size. Most of the time the real > > > MMIO space occupied by the device is actually much smaller than 64K. > > > > Indeed, it's quite common for TRM memory maps to be written in terms of > > the > > interconnect configuration, i.e. from the point of view of the > > interconnect > > itself, that whole range of address space is assigned to that peripheral, > > and it may even be true that the entire range is routed to the port where > > that peripheral is connected. However what's of more interest for DT is > > how > > much of that range the peripheral itself actually decodes. > > Yes, there are not problem by mapping bigger space in most case. > > amba bus's periphal use close to end of region to show device's identical > information. Ah, thanks for the explanation. This make things more clear. But on the other is it sensible to assume the memory resource size to fit the IP address space? It appears to me the size is fixed to 4kiB anyway. Would it make more sense to read the values from the address "base + 4K - x" instead of "base + size - x"? Best regards, Alexander > In drivers/amba/bus.c, > > amba_read_periphid() > { > ... > size = resource_size(&dev->res); > ... > for (pid = 0, i = 0; i < 4; i++) > pid |= (readl(tmp + size - 0x20 + 4 * i) & 255) << (i * 8); > } > > So the range in DTS for arm,primecell should be actual IP address space. > > > Robin. > > > > > _______________________________________________ > > > linux-arm-kernel mailing list > > > linux-arm-kernel@lists.infradead.org > > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On 2023-07-07 06:34, Alexander Stein wrote: > Hi Frank, > > Am Donnerstag, 6. Juli 2023, 16:39:07 CEST schrieb Frank Li: >> On Thu, Jul 06, 2023 at 12:06:19PM +0100, Robin Murphy wrote: >>>>> Am Mittwoch, 5. Juli 2023, 22:59:53 CEST schrieb Frank Li: >>>>>> The reg size of etm nodes is incorrectly set to 64k instead of 4k. >>>>>> This >>>>>> leads to a crash when calling amba_read_periphid(). After corrected >>>>>> reg >>>>>> size, amba_read_periphid() retrieve the correct periphid. >>>>>> arm,primecell-periphid were removed from the etm nodes. >>>>> >>>>> So this means the reference manual is wrong here? It clearly states >>>>> the size is 64kiB. Reference Manual i.MX8MP Rev 1. 06/2021 >>>>> On a side note: Is imx8mq affected by this as well? The DAP memory >>>>> table lists similar sizes in the RM . >>>> >>>> Note that the 64K MMIO space per device is really an alignment thing. >>>> It's a recommendation from ARM to allow individual device MMIO regions >>>> to be mapped on kernels with 64K page size. Most of the time the real >>>> MMIO space occupied by the device is actually much smaller than 64K. >>> >>> Indeed, it's quite common for TRM memory maps to be written in terms of >>> the >>> interconnect configuration, i.e. from the point of view of the >>> interconnect >>> itself, that whole range of address space is assigned to that peripheral, >>> and it may even be true that the entire range is routed to the port where >>> that peripheral is connected. However what's of more interest for DT is >>> how >>> much of that range the peripheral itself actually decodes. >> >> Yes, there are not problem by mapping bigger space in most case. >> >> amba bus's periphal use close to end of region to show device's identical >> information. > > Ah, thanks for the explanation. This make things more clear. > But on the other is it sensible to assume the memory resource size to fit the > IP address space? It appears to me the size is fixed to 4kiB anyway. Would it > make more sense to read the values from the address "base + 4K - x" instead of > "base + size - x"? The size of PrimeCell components in general isn't necessarily 4KB though, and the ID registers were defined relative to the *end* of the register space. The old PrimeCell standards evolved into the CoreSight spec, and from the oldest version of that I can easily link to[1]: "Each component occupies one or more contiguous 4KB blocks of address space. Where a component occupies more than one 4KB block, these registers must appear in the highest 4KB block." (FWIW the latest Coresight 3.0 spec relaxes this restriction, but we tend to model newer stuff as platform drivers with explicit DT/ACPI identifiers rather than amba drivers anyway) Thanks, Robin. [1] https://developer.arm.com/documentation/ihi0029/d/?lang=en > > Best regards, > Alexander > >> In drivers/amba/bus.c, >> >> amba_read_periphid() >> { >> ... >> size = resource_size(&dev->res); >> ... >> for (pid = 0, i = 0; i < 4; i++) >> pid |= (readl(tmp + size - 0x20 + 4 * i) & 255) << (i * > 8); >> } >> >> So the range in DTS for arm,primecell should be actual IP address space. >> >>> Robin. >>> >>>> _______________________________________________ >>>> linux-arm-kernel mailing list >>>> linux-arm-kernel@lists.infradead.org >>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > >
Am Freitag, dem 07.07.2023 um 07:34 +0200 schrieb Alexander Stein: > Hi Frank, > > Am Donnerstag, 6. Juli 2023, 16:39:07 CEST schrieb Frank Li: > > On Thu, Jul 06, 2023 at 12:06:19PM +0100, Robin Murphy wrote: > > > > > Am Mittwoch, 5. Juli 2023, 22:59:53 CEST schrieb Frank Li: > > > > > > The reg size of etm nodes is incorrectly set to 64k instead of 4k. > > > > > > This > > > > > > leads to a crash when calling amba_read_periphid(). After corrected > > > > > > reg > > > > > > size, amba_read_periphid() retrieve the correct periphid. > > > > > > arm,primecell-periphid were removed from the etm nodes. > > > > > > > > > > So this means the reference manual is wrong here? It clearly states > > > > > the size is 64kiB. Reference Manual i.MX8MP Rev 1. 06/2021 > > > > > On a side note: Is imx8mq affected by this as well? The DAP memory > > > > > table lists similar sizes in the RM . > > > > > > > > Note that the 64K MMIO space per device is really an alignment thing. > > > > It's a recommendation from ARM to allow individual device MMIO regions > > > > to be mapped on kernels with 64K page size. Most of the time the real > > > > MMIO space occupied by the device is actually much smaller than 64K. > > > > > > Indeed, it's quite common for TRM memory maps to be written in terms of > > > the > > > interconnect configuration, i.e. from the point of view of the > > > interconnect > > > itself, that whole range of address space is assigned to that peripheral, > > > and it may even be true that the entire range is routed to the port where > > > that peripheral is connected. However what's of more interest for DT is > > > how > > > much of that range the peripheral itself actually decodes. > > > > Yes, there are not problem by mapping bigger space in most case. > > > > amba bus's periphal use close to end of region to show device's identical > > information. > > Ah, thanks for the explanation. This make things more clear. > But on the other is it sensible to assume the memory resource size to fit the > IP address space? It appears to me the size is fixed to 4kiB anyway. Would it > make more sense to read the values from the address "base + 4K - x" instead of > "base + size - x"? > Huh? Why would AMBA peripherals be fixed to 4K in MMIO size? The ID detection by reading offsets at the end of the MMIO range is generic AMBA bus behavior. The DT should declare the real peripheral MMIO size. Declaring the aligned size is not much of a problem on 64bit systems with huge address spaces but it still wastes vmap space when remapping the MMIO range. When the real peripheral decode size is known it should always be preferred over the aligned size. Regards, Lucas > Best regards, > Alexander > > > In drivers/amba/bus.c, > > > > amba_read_periphid() > > { > > ... > > size = resource_size(&dev->res); > > ... > > for (pid = 0, i = 0; i < 4; i++) > > pid |= (readl(tmp + size - 0x20 + 4 * i) & 255) << (i * > 8); > > } > > > > So the range in DTS for arm,primecell should be actual IP address space. > > > > > Robin. > > > > > > > _______________________________________________ > > > > linux-arm-kernel mailing list > > > > linux-arm-kernel@lists.infradead.org > > > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > >
Hi Robin, Am Freitag, 7. Juli 2023, 10:50:31 CEST schrieb Robin Murphy: > On 2023-07-07 06:34, Alexander Stein wrote: > > Hi Frank, > > > > Am Donnerstag, 6. Juli 2023, 16:39:07 CEST schrieb Frank Li: > >> On Thu, Jul 06, 2023 at 12:06:19PM +0100, Robin Murphy wrote: > >>>>> Am Mittwoch, 5. Juli 2023, 22:59:53 CEST schrieb Frank Li: > >>>>>> The reg size of etm nodes is incorrectly set to 64k instead of 4k. > >>>>>> This > >>>>>> leads to a crash when calling amba_read_periphid(). After corrected > >>>>>> reg > >>>>>> size, amba_read_periphid() retrieve the correct periphid. > >>>>>> arm,primecell-periphid were removed from the etm nodes. > >>>>> > >>>>> So this means the reference manual is wrong here? It clearly states > >>>>> the size is 64kiB. Reference Manual i.MX8MP Rev 1. 06/2021 > >>>>> On a side note: Is imx8mq affected by this as well? The DAP memory > >>>>> table lists similar sizes in the RM . > >>>> > >>>> Note that the 64K MMIO space per device is really an alignment thing. > >>>> It's a recommendation from ARM to allow individual device MMIO regions > >>>> to be mapped on kernels with 64K page size. Most of the time the real > >>>> MMIO space occupied by the device is actually much smaller than 64K. > >>> > >>> Indeed, it's quite common for TRM memory maps to be written in terms of > >>> the > >>> interconnect configuration, i.e. from the point of view of the > >>> interconnect > >>> itself, that whole range of address space is assigned to that > >>> peripheral, > >>> and it may even be true that the entire range is routed to the port > >>> where > >>> that peripheral is connected. However what's of more interest for DT is > >>> how > >>> much of that range the peripheral itself actually decodes. > >> > >> Yes, there are not problem by mapping bigger space in most case. > >> > >> amba bus's periphal use close to end of region to show device's identical > >> information. > > > > Ah, thanks for the explanation. This make things more clear. > > But on the other is it sensible to assume the memory resource size to fit > > the IP address space? It appears to me the size is fixed to 4kiB anyway. > > Would it make more sense to read the values from the address "base + 4K - > > x" instead of "base + size - x"? > > The size of PrimeCell components in general isn't necessarily 4KB > though, and the ID registers were defined relative to the *end* of the > register space. The old PrimeCell standards evolved into the CoreSight > spec, and from the oldest version of that I can easily link to[1]: > > "Each component occupies one or more contiguous 4KB blocks of address > space. Where a component occupies more than one 4KB block, these > registers must appear in the highest 4KB block." > > (FWIW the latest Coresight 3.0 spec relaxes this restriction, but we > tend to model newer stuff as platform drivers with explicit DT/ACPI > identifiers rather than amba drivers anyway) Ah, I wasn't aware the register space for PrimeCells/CoreSight could be larger than 4k. So the exact size must be known and used in DT. Thanks for explanation. Best regards, Alexander > Thanks, > Robin. > > [1] https://developer.arm.com/documentation/ihi0029/d/?lang=en > > > Best regards, > > Alexander > > > >> In drivers/amba/bus.c, > >> > >> amba_read_periphid() > >> { > >> > >> ... > >> size = resource_size(&dev->res); > >> ... > >> for (pid = 0, i = 0; i < 4; i++) > >> > >> pid |= (readl(tmp + size - 0x20 + 4 * i) & 255) << (i * > > > > 8); > > > >> } > >> > >> So the range in DTS for arm,primecell should be actual IP address space. > >> > >>> Robin. > >>> > >>>> _______________________________________________ > >>>> linux-arm-kernel mailing list > >>>> linux-arm-kernel@lists.infradead.org > >>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index cc406bb338fe..e0ca82ff6f15 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -306,8 +306,7 @@ soc: soc@0 { etm0: etm@28440000 { compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x28440000 0x10000>; - arm,primecell-periphid = <0xbb95d>; + reg = <0x28440000 0x1000>; cpu = <&A53_0>; clocks = <&clk IMX8MP_CLK_MAIN_AXI>; clock-names = "apb_pclk"; @@ -323,8 +322,7 @@ etm0_out_port: endpoint { etm1: etm@28540000 { compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x28540000 0x10000>; - arm,primecell-periphid = <0xbb95d>; + reg = <0x28540000 0x1000>; cpu = <&A53_1>; clocks = <&clk IMX8MP_CLK_MAIN_AXI>; clock-names = "apb_pclk"; @@ -340,8 +338,7 @@ etm1_out_port: endpoint { etm2: etm@28640000 { compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x28640000 0x10000>; - arm,primecell-periphid = <0xbb95d>; + reg = <0x28640000 0x1000>; cpu = <&A53_2>; clocks = <&clk IMX8MP_CLK_MAIN_AXI>; clock-names = "apb_pclk"; @@ -357,8 +354,7 @@ etm2_out_port: endpoint { etm3: etm@28740000 { compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x28740000 0x10000>; - arm,primecell-periphid = <0xbb95d>; + reg = <0x28740000 0x1000>; cpu = <&A53_3>; clocks = <&clk IMX8MP_CLK_MAIN_AXI>; clock-names = "apb_pclk";
The reg size of etm nodes is incorrectly set to 64k instead of 4k. This leads to a crash when calling amba_read_periphid(). After corrected reg size, amba_read_periphid() retrieve the correct periphid. arm,primecell-periphid were removed from the etm nodes. Signed-off-by: Frank Li <Frank.Li@nxp.com> --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-)