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[1/2] dt-bindings: spi: spi-cadence: Describe power-domains property

Message ID 987430ee905fd299fe962663d94f848b341c87df.1691047461.git.michal.simek@amd.com
State Accepted
Commit 88362275240303455bbec05c249daa84aff07059
Headers show
Series [1/2] dt-bindings: spi: spi-cadence: Describe power-domains property | expand

Commit Message

Michal Simek Aug. 3, 2023, 7:24 a.m. UTC 
ZynqMP Cadence SPI IP core has own power domain that's why describe it as
optional property.

Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 Documentation/devicetree/bindings/spi/spi-cadence.yaml | 3 +++
 1 file changed, 3 insertions(+)
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Patch

diff --git a/Documentation/devicetree/bindings/spi/spi-cadence.yaml b/Documentation/devicetree/bindings/spi/spi-cadence.yaml
index b7552739b554..9eda7f0d2869 100644
--- a/Documentation/devicetree/bindings/spi/spi-cadence.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-cadence.yaml
@@ -49,6 +49,9 @@  properties:
     enum: [ 0, 1 ]
     default: 0
 
+  power-domains:
+    maxItems: 1
+
 required:
   - compatible
   - reg