| Message ID | 20230920074653.2509631-2-xiao.w.wang@intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | riscv: Optimize bitops with Zbb extension | expand |
On Wed, Sep 20, 2023 at 03:46:52PM +0800, Xiao Wang wrote: > Now hwcap.h and cpufeature.h are mutually including each other, and most of > the variable/API declarations in hwcap.h are implemented in cpufeature.c, > so, it's better to move them into cpufeature.h and leave only macros for > ISA extension logical IDs in hwcap.h. > > BTW, the riscv_isa_extension_mask macro is not used now, so this patch > removes it. > > Signed-off-by: Xiao Wang <xiao.w.wang@intel.com> Suggested-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Thanks, drew
Hi Xiao, kernel test robot noticed the following build errors: [auto build test ERROR on linus/master] [also build test ERROR on v6.6-rc2 next-20230920] [cannot apply to efi/next] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Xiao-Wang/riscv-Rearrange-hwcap-h-and-cpufeature-h/20230920-154024 base: linus/master patch link: https://lore.kernel.org/r/20230920074653.2509631-2-xiao.w.wang%40intel.com patch subject: [PATCH v2 1/2] riscv: Rearrange hwcap.h and cpufeature.h config: riscv-rv32_defconfig (https://download.01.org/0day-ci/archive/20230920/202309201921.GvBmYK5q-lkp@intel.com/config) compiler: riscv32-linux-gcc (GCC) 13.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20230920/202309201921.GvBmYK5q-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <yujie.liu@intel.com> | Closes: https://lore.kernel.org/r/202309201921.GvBmYK5q-lkp@intel.com/ All errors (new ones prefixed by >>): fs/binfmt_elf.c: In function 'create_elf_tables': >> arch/riscv/include/asm/elf.h:70:25: error: implicit declaration of function 'riscv_get_elf_hwcap'; did you mean 'riscv_fill_hwcap'? [-Werror=implicit-function-declaration] 70 | #define ELF_HWCAP riscv_get_elf_hwcap() | ^~~~~~~~~~~~~~~~~~~ fs/binfmt_elf.c:248:31: note: in definition of macro 'NEW_AUX_ENT' 248 | *elf_info++ = val; \ | ^~~ fs/binfmt_elf.c:260:31: note: in expansion of macro 'ELF_HWCAP' 260 | NEW_AUX_ENT(AT_HWCAP, ELF_HWCAP); | ^~~~~~~~~ cc1: some warnings being treated as errors -- arch/riscv/kvm/main.c: In function 'riscv_kvm_init': >> arch/riscv/kvm/main.c:73:14: error: implicit declaration of function 'riscv_isa_extension_available' [-Werror=implicit-function-declaration] 73 | if (!riscv_isa_extension_available(NULL, h)) { | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ >> arch/riscv/kvm/main.c:73:50: error: 'h' undeclared (first use in this function) 73 | if (!riscv_isa_extension_available(NULL, h)) { | ^ arch/riscv/kvm/main.c:73:50: note: each undeclared identifier is reported only once for each function it appears in cc1: some warnings being treated as errors -- arch/riscv/kvm/tlb.c: In function 'kvm_riscv_local_hfence_gvma_vmid_gpa': >> arch/riscv/kvm/tlb.c:18:25: error: implicit declaration of function 'riscv_has_extension_unlikely' [-Werror=implicit-function-declaration] 18 | #define has_svinval() riscv_has_extension_unlikely(RISCV_ISA_EXT_SVINVAL) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/riscv/kvm/tlb.c:31:13: note: in expansion of macro 'has_svinval' 31 | if (has_svinval()) { | ^~~~~~~~~~~ cc1: some warnings being treated as errors -- arch/riscv/kvm/vcpu_fp.c: In function 'kvm_riscv_vcpu_fp_reset': >> arch/riscv/kvm/vcpu_fp.c:22:13: error: implicit declaration of function 'riscv_isa_extension_available' [-Werror=implicit-function-declaration] 22 | if (riscv_isa_extension_available(vcpu->arch.isa, f) || | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ >> arch/riscv/kvm/vcpu_fp.c:22:59: error: 'f' undeclared (first use in this function); did you mean 'fd'? 22 | if (riscv_isa_extension_available(vcpu->arch.isa, f) || | ^ | fd arch/riscv/kvm/vcpu_fp.c:22:59: note: each undeclared identifier is reported only once for each function it appears in >> arch/riscv/kvm/vcpu_fp.c:23:59: error: 'd' undeclared (first use in this function); did you mean 'fd'? 23 | riscv_isa_extension_available(vcpu->arch.isa, d)) | ^ | fd arch/riscv/kvm/vcpu_fp.c: In function 'kvm_riscv_vcpu_guest_fp_save': arch/riscv/kvm/vcpu_fp.c:39:56: error: 'd' undeclared (first use in this function); did you mean 'fd'? 39 | if (riscv_isa_extension_available(isa, d)) | ^ | fd arch/riscv/kvm/vcpu_fp.c:41:61: error: 'f' undeclared (first use in this function); did you mean 'fd'? 41 | else if (riscv_isa_extension_available(isa, f)) | ^ | fd arch/riscv/kvm/vcpu_fp.c: In function 'kvm_riscv_vcpu_guest_fp_restore': arch/riscv/kvm/vcpu_fp.c:51:56: error: 'd' undeclared (first use in this function); did you mean 'fd'? 51 | if (riscv_isa_extension_available(isa, d)) | ^ | fd arch/riscv/kvm/vcpu_fp.c:53:61: error: 'f' undeclared (first use in this function); did you mean 'fd'? 53 | else if (riscv_isa_extension_available(isa, f)) | ^ | fd arch/riscv/kvm/vcpu_fp.c: In function 'kvm_riscv_vcpu_host_fp_save': arch/riscv/kvm/vcpu_fp.c:62:49: error: 'd' undeclared (first use in this function); did you mean 'fd'? 62 | if (riscv_isa_extension_available(NULL, d)) | ^ | fd arch/riscv/kvm/vcpu_fp.c:64:54: error: 'f' undeclared (first use in this function); did you mean 'fd'? 64 | else if (riscv_isa_extension_available(NULL, f)) | ^ | fd arch/riscv/kvm/vcpu_fp.c: In function 'kvm_riscv_vcpu_host_fp_restore': arch/riscv/kvm/vcpu_fp.c:70:49: error: 'd' undeclared (first use in this function); did you mean 'fd'? 70 | if (riscv_isa_extension_available(NULL, d)) | ^ | fd arch/riscv/kvm/vcpu_fp.c:72:54: error: 'f' undeclared (first use in this function); did you mean 'fd'? 72 | else if (riscv_isa_extension_available(NULL, f)) | ^ | fd arch/riscv/kvm/vcpu_fp.c: In function 'kvm_riscv_vcpu_get_reg_fp': arch/riscv/kvm/vcpu_fp.c:90:59: error: 'f' undeclared (first use in this function); did you mean 'fd'? 90 | riscv_isa_extension_available(vcpu->arch.isa, f)) { | ^ | fd arch/riscv/kvm/vcpu_fp.c:101:66: error: 'd' undeclared (first use in this function); did you mean 'fd'? 101 | riscv_isa_extension_available(vcpu->arch.isa, d)) { | ^ | fd arch/riscv/kvm/vcpu_fp.c: In function 'kvm_riscv_vcpu_set_reg_fp': arch/riscv/kvm/vcpu_fp.c:135:59: error: 'f' undeclared (first use in this function); did you mean 'fd'? 135 | riscv_isa_extension_available(vcpu->arch.isa, f)) { | ^ | fd arch/riscv/kvm/vcpu_fp.c:146:66: error: 'd' undeclared (first use in this function); did you mean 'fd'? 146 | riscv_isa_extension_available(vcpu->arch.isa, d)) { | ^ | fd cc1: some warnings being treated as errors -- arch/riscv/kvm/vcpu_timer.c: In function 'kvm_riscv_vcpu_timer_init': >> arch/riscv/kvm/vcpu_timer.c:256:13: error: implicit declaration of function 'riscv_isa_extension_available' [-Werror=implicit-function-declaration] 256 | if (riscv_isa_extension_available(NULL, SSTC)) { | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ >> arch/riscv/kvm/vcpu_timer.c:256:49: error: 'SSTC' undeclared (first use in this function) 256 | if (riscv_isa_extension_available(NULL, SSTC)) { | ^~~~ arch/riscv/kvm/vcpu_timer.c:256:49: note: each undeclared identifier is reported only once for each function it appears in cc1: some warnings being treated as errors -- arch/riscv/kvm/vcpu_pmu.c: In function 'kvm_riscv_vcpu_pmu_init': >> arch/riscv/kvm/vcpu_pmu.c:556:14: error: implicit declaration of function 'riscv_isa_extension_available' [-Werror=implicit-function-declaration] 556 | if (!riscv_isa_extension_available(NULL, SSCOFPMF)) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ >> arch/riscv/kvm/vcpu_pmu.c:556:50: error: 'SSCOFPMF' undeclared (first use in this function) 556 | if (!riscv_isa_extension_available(NULL, SSCOFPMF)) | ^~~~~~~~ arch/riscv/kvm/vcpu_pmu.c:556:50: note: each undeclared identifier is reported only once for each function it appears in cc1: some warnings being treated as errors -- arch/riscv/kvm/aia.c: In function 'kvm_riscv_aia_init': >> arch/riscv/kvm/aia.c:604:14: error: implicit declaration of function 'riscv_isa_extension_available' [-Werror=implicit-function-declaration] 604 | if (!riscv_isa_extension_available(NULL, SxAIA)) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ >> arch/riscv/kvm/aia.c:604:50: error: 'SxAIA' undeclared (first use in this function) 604 | if (!riscv_isa_extension_available(NULL, SxAIA)) | ^~~~~ arch/riscv/kvm/aia.c:604:50: note: each undeclared identifier is reported only once for each function it appears in cc1: some warnings being treated as errors -- drivers/perf/riscv_pmu_sbi.c: In function 'pmu_sbi_setup_irqs': >> drivers/perf/riscv_pmu_sbi.c:803:13: error: implicit declaration of function 'riscv_isa_extension_available' [-Werror=implicit-function-declaration] 803 | if (riscv_isa_extension_available(NULL, SSCOFPMF)) { | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ >> drivers/perf/riscv_pmu_sbi.c:803:49: error: 'SSCOFPMF' undeclared (first use in this function) 803 | if (riscv_isa_extension_available(NULL, SSCOFPMF)) { | ^~~~~~~~ drivers/perf/riscv_pmu_sbi.c:803:49: note: each undeclared identifier is reported only once for each function it appears in cc1: some warnings being treated as errors vim +70 arch/riscv/include/asm/elf.h 2350bd192fa2d9 Palmer Dabbelt 2023-02-02 64 2129a235c09896 Palmer Dabbelt 2017-07-10 65 /* 2350bd192fa2d9 Palmer Dabbelt 2023-02-02 66 * Provides information on the availiable set of ISA extensions to userspace, 2350bd192fa2d9 Palmer Dabbelt 2023-02-02 67 * via a bitmap that coorespends to each single-letter ISA extension. This is 2350bd192fa2d9 Palmer Dabbelt 2023-02-02 68 * essentially defunct, but will remain for compatibility with userspace. 2129a235c09896 Palmer Dabbelt 2017-07-10 69 */ 50724efcb370c6 Andy Chiu 2023-06-05 @70 #define ELF_HWCAP riscv_get_elf_hwcap() 2129a235c09896 Palmer Dabbelt 2017-07-10 71 extern unsigned long elf_hwcap; 2129a235c09896 Palmer Dabbelt 2017-07-10 72
Hi Yujie, I would fix the riscv32 build issue in v3. I checked some *.o.cmd files from riscv64 build and see that cpufeature.h is indirectly included there, but it's not for riscv32 build. I need to change "hwcap.h" to "cpufeature.h" for all places where cpu feature detection APIs are called. Thanks for the info. BRs, Xiao > -----Original Message----- > From: Liu, Yujie <yujie.liu@intel.com> > Sent: Tuesday, September 26, 2023 2:18 PM > To: Wang, Xiao W <xiao.w.wang@intel.com>; paul.walmsley@sifive.com; > palmer@dabbelt.com; aou@eecs.berkeley.edu; ardb@kernel.org > Cc: oe-kbuild-all@lists.linux.dev; anup@brainfault.org; Li, Haicheng > <haicheng.li@intel.com>; ajones@ventanamicro.com; linux- > riscv@lists.infradead.org; linux-efi@vger.kernel.org; linux- > kernel@vger.kernel.org; Wang, Xiao W <xiao.w.wang@intel.com> > Subject: Re: [PATCH v2 1/2] riscv: Rearrange hwcap.h and cpufeature.h > > Hi Xiao, > > kernel test robot noticed the following build errors: > > [auto build test ERROR on linus/master] > [also build test ERROR on v6.6-rc2 next-20230920] > [cannot apply to efi/next] > [If your patch is applied to the wrong git tree, kindly drop us a note. > And when submitting patch, we suggest to use '--base' as documented in > https://git-scm.com/docs/git-format-patch#_base_tree_information] > > url: https://github.com/intel-lab-lkp/linux/commits/Xiao-Wang/riscv- > Rearrange-hwcap-h-and-cpufeature-h/20230920-154024 > base: linus/master > patch link: https://lore.kernel.org/r/20230920074653.2509631-2- > xiao.w.wang%40intel.com > patch subject: [PATCH v2 1/2] riscv: Rearrange hwcap.h and cpufeature.h > config: riscv-rv32_defconfig (https://download.01.org/0day- > ci/archive/20230920/202309201921.GvBmYK5q-lkp@intel.com/config) > compiler: riscv32-linux-gcc (GCC) 13.2.0 > reproduce (this is a W=1 build): (https://download.01.org/0day- > ci/archive/20230920/202309201921.GvBmYK5q-lkp@intel.com/reproduce) > > If you fix the issue in a separate patch/commit (i.e. not just a new version of > the same patch/commit), kindly add following tags > | Reported-by: kernel test robot <yujie.liu@intel.com> > | Closes: https://lore.kernel.org/r/202309201921.GvBmYK5q- > lkp@intel.com/ > > All errors (new ones prefixed by >>): > > fs/binfmt_elf.c: In function 'create_elf_tables': > >> arch/riscv/include/asm/elf.h:70:25: error: implicit declaration of function > 'riscv_get_elf_hwcap'; did you mean 'riscv_fill_hwcap'? [-Werror=implicit- > function-declaration] > 70 | #define ELF_HWCAP riscv_get_elf_hwcap() > | ^~~~~~~~~~~~~~~~~~~ > fs/binfmt_elf.c:248:31: note: in definition of macro 'NEW_AUX_ENT' > 248 | *elf_info++ = val; \ > | ^~~ > fs/binfmt_elf.c:260:31: note: in expansion of macro 'ELF_HWCAP' > 260 | NEW_AUX_ENT(AT_HWCAP, ELF_HWCAP); > | ^~~~~~~~~ > cc1: some warnings being treated as errors > -- > arch/riscv/kvm/main.c: In function 'riscv_kvm_init': > >> arch/riscv/kvm/main.c:73:14: error: implicit declaration of function > 'riscv_isa_extension_available' [-Werror=implicit-function-declaration] > 73 | if (!riscv_isa_extension_available(NULL, h)) { > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > >> arch/riscv/kvm/main.c:73:50: error: 'h' undeclared (first use in this > function) > 73 | if (!riscv_isa_extension_available(NULL, h)) { > | ^ > arch/riscv/kvm/main.c:73:50: note: each undeclared identifier is reported > only once for each function it appears in > cc1: some warnings being treated as errors > -- > arch/riscv/kvm/tlb.c: In function 'kvm_riscv_local_hfence_gvma_vmid_gpa': > >> arch/riscv/kvm/tlb.c:18:25: error: implicit declaration of function > 'riscv_has_extension_unlikely' [-Werror=implicit-function-declaration] > 18 | #define has_svinval() > riscv_has_extension_unlikely(RISCV_ISA_EXT_SVINVAL) > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ > arch/riscv/kvm/tlb.c:31:13: note: in expansion of macro 'has_svinval' > 31 | if (has_svinval()) { > | ^~~~~~~~~~~ > cc1: some warnings being treated as errors > -- > arch/riscv/kvm/vcpu_fp.c: In function 'kvm_riscv_vcpu_fp_reset': > >> arch/riscv/kvm/vcpu_fp.c:22:13: error: implicit declaration of function > 'riscv_isa_extension_available' [-Werror=implicit-function-declaration] > 22 | if (riscv_isa_extension_available(vcpu->arch.isa, f) || > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > >> arch/riscv/kvm/vcpu_fp.c:22:59: error: 'f' undeclared (first use in this > function); did you mean 'fd'? > 22 | if (riscv_isa_extension_available(vcpu->arch.isa, f) || > | ^ > | fd > arch/riscv/kvm/vcpu_fp.c:22:59: note: each undeclared identifier is reported > only once for each function it appears in > >> arch/riscv/kvm/vcpu_fp.c:23:59: error: 'd' undeclared (first use in this > function); did you mean 'fd'? > 23 | riscv_isa_extension_available(vcpu->arch.isa, d)) > | ^ > | fd > arch/riscv/kvm/vcpu_fp.c: In function 'kvm_riscv_vcpu_guest_fp_save': > arch/riscv/kvm/vcpu_fp.c:39:56: error: 'd' undeclared (first use in this > function); did you mean 'fd'? > 39 | if (riscv_isa_extension_available(isa, d)) > | ^ > | fd > arch/riscv/kvm/vcpu_fp.c:41:61: error: 'f' undeclared (first use in this > function); did you mean 'fd'? > 41 | else if (riscv_isa_extension_available(isa, f)) > | ^ > | fd > arch/riscv/kvm/vcpu_fp.c: In function 'kvm_riscv_vcpu_guest_fp_restore': > arch/riscv/kvm/vcpu_fp.c:51:56: error: 'd' undeclared (first use in this > function); did you mean 'fd'? > 51 | if (riscv_isa_extension_available(isa, d)) > | ^ > | fd > arch/riscv/kvm/vcpu_fp.c:53:61: error: 'f' undeclared (first use in this > function); did you mean 'fd'? > 53 | else if (riscv_isa_extension_available(isa, f)) > | ^ > | fd > arch/riscv/kvm/vcpu_fp.c: In function 'kvm_riscv_vcpu_host_fp_save': > arch/riscv/kvm/vcpu_fp.c:62:49: error: 'd' undeclared (first use in this > function); did you mean 'fd'? > 62 | if (riscv_isa_extension_available(NULL, d)) > | ^ > | fd > arch/riscv/kvm/vcpu_fp.c:64:54: error: 'f' undeclared (first use in this > function); did you mean 'fd'? > 64 | else if (riscv_isa_extension_available(NULL, f)) > | ^ > | fd > arch/riscv/kvm/vcpu_fp.c: In function 'kvm_riscv_vcpu_host_fp_restore': > arch/riscv/kvm/vcpu_fp.c:70:49: error: 'd' undeclared (first use in this > function); did you mean 'fd'? > 70 | if (riscv_isa_extension_available(NULL, d)) > | ^ > | fd > arch/riscv/kvm/vcpu_fp.c:72:54: error: 'f' undeclared (first use in this > function); did you mean 'fd'? > 72 | else if (riscv_isa_extension_available(NULL, f)) > | ^ > | fd > arch/riscv/kvm/vcpu_fp.c: In function 'kvm_riscv_vcpu_get_reg_fp': > arch/riscv/kvm/vcpu_fp.c:90:59: error: 'f' undeclared (first use in this > function); did you mean 'fd'? > 90 | riscv_isa_extension_available(vcpu->arch.isa, f)) { > | ^ > | fd > arch/riscv/kvm/vcpu_fp.c:101:66: error: 'd' undeclared (first use in this > function); did you mean 'fd'? > 101 | riscv_isa_extension_available(vcpu->arch.isa, d)) { > | ^ > | fd > arch/riscv/kvm/vcpu_fp.c: In function 'kvm_riscv_vcpu_set_reg_fp': > arch/riscv/kvm/vcpu_fp.c:135:59: error: 'f' undeclared (first use in this > function); did you mean 'fd'? > 135 | riscv_isa_extension_available(vcpu->arch.isa, f)) { > | ^ > | fd > arch/riscv/kvm/vcpu_fp.c:146:66: error: 'd' undeclared (first use in this > function); did you mean 'fd'? > 146 | riscv_isa_extension_available(vcpu->arch.isa, d)) { > | ^ > | fd > cc1: some warnings being treated as errors > -- > arch/riscv/kvm/vcpu_timer.c: In function 'kvm_riscv_vcpu_timer_init': > >> arch/riscv/kvm/vcpu_timer.c:256:13: error: implicit declaration of function > 'riscv_isa_extension_available' [-Werror=implicit-function-declaration] > 256 | if (riscv_isa_extension_available(NULL, SSTC)) { > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > >> arch/riscv/kvm/vcpu_timer.c:256:49: error: 'SSTC' undeclared (first use in > this function) > 256 | if (riscv_isa_extension_available(NULL, SSTC)) { > | ^~~~ > arch/riscv/kvm/vcpu_timer.c:256:49: note: each undeclared identifier is > reported only once for each function it appears in > cc1: some warnings being treated as errors > -- > arch/riscv/kvm/vcpu_pmu.c: In function 'kvm_riscv_vcpu_pmu_init': > >> arch/riscv/kvm/vcpu_pmu.c:556:14: error: implicit declaration of function > 'riscv_isa_extension_available' [-Werror=implicit-function-declaration] > 556 | if (!riscv_isa_extension_available(NULL, SSCOFPMF)) > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > >> arch/riscv/kvm/vcpu_pmu.c:556:50: error: 'SSCOFPMF' undeclared (first > use in this function) > 556 | if (!riscv_isa_extension_available(NULL, SSCOFPMF)) > | ^~~~~~~~ > arch/riscv/kvm/vcpu_pmu.c:556:50: note: each undeclared identifier is > reported only once for each function it appears in > cc1: some warnings being treated as errors > -- > arch/riscv/kvm/aia.c: In function 'kvm_riscv_aia_init': > >> arch/riscv/kvm/aia.c:604:14: error: implicit declaration of function > 'riscv_isa_extension_available' [-Werror=implicit-function-declaration] > 604 | if (!riscv_isa_extension_available(NULL, SxAIA)) > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > >> arch/riscv/kvm/aia.c:604:50: error: 'SxAIA' undeclared (first use in this > function) > 604 | if (!riscv_isa_extension_available(NULL, SxAIA)) > | ^~~~~ > arch/riscv/kvm/aia.c:604:50: note: each undeclared identifier is reported > only once for each function it appears in > cc1: some warnings being treated as errors > -- > drivers/perf/riscv_pmu_sbi.c: In function 'pmu_sbi_setup_irqs': > >> drivers/perf/riscv_pmu_sbi.c:803:13: error: implicit declaration of function > 'riscv_isa_extension_available' [-Werror=implicit-function-declaration] > 803 | if (riscv_isa_extension_available(NULL, SSCOFPMF)) { > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > >> drivers/perf/riscv_pmu_sbi.c:803:49: error: 'SSCOFPMF' undeclared (first > use in this function) > 803 | if (riscv_isa_extension_available(NULL, SSCOFPMF)) { > | ^~~~~~~~ > drivers/perf/riscv_pmu_sbi.c:803:49: note: each undeclared identifier is > reported only once for each function it appears in > cc1: some warnings being treated as errors > > > vim +70 arch/riscv/include/asm/elf.h > > 2350bd192fa2d9 Palmer Dabbelt 2023-02-02 64 > 2129a235c09896 Palmer Dabbelt 2017-07-10 65 /* > 2350bd192fa2d9 Palmer Dabbelt 2023-02-02 66 * Provides information on > the availiable set of ISA extensions to userspace, > 2350bd192fa2d9 Palmer Dabbelt 2023-02-02 67 * via a bitmap that > coorespends to each single-letter ISA extension. This is > 2350bd192fa2d9 Palmer Dabbelt 2023-02-02 68 * essentially defunct, but > will remain for compatibility with userspace. > 2129a235c09896 Palmer Dabbelt 2017-07-10 69 */ > 50724efcb370c6 Andy Chiu 2023-06-05 @70 #define ELF_HWCAP > riscv_get_elf_hwcap() > 2129a235c09896 Palmer Dabbelt 2017-07-10 71 extern unsigned long > elf_hwcap; > 2129a235c09896 Palmer Dabbelt 2017-07-10 72 > > -- > 0-DAY CI Kernel Test Service > https://github.com/intel/lkp-tests/wiki
diff --git a/arch/riscv/include/asm/cpufeature.h b/arch/riscv/include/asm/cpufeature.h index 13b7d35648a9..3061d33abc2f 100644 --- a/arch/riscv/include/asm/cpufeature.h +++ b/arch/riscv/include/asm/cpufeature.h @@ -7,7 +7,10 @@ #define _ASM_CPUFEATURE_H #include <linux/bitmap.h> +#include <linux/jump_label.h> #include <asm/hwcap.h> +#include <asm/alternative-macros.h> +#include <asm/errno.h> /* * These are probed via a device_initcall(), via either the SBI or directly @@ -33,4 +36,84 @@ extern struct riscv_isainfo hart_isa[NR_CPUS]; void check_unaligned_access(int cpu); void riscv_user_isa_enable(void); +unsigned long riscv_get_elf_hwcap(void); + +struct riscv_isa_ext_data { + const unsigned int id; + const char *name; + const char *property; +}; + +extern const struct riscv_isa_ext_data riscv_isa_ext[]; +extern const size_t riscv_isa_ext_count; +extern bool riscv_isa_fallback; + +unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap); + +bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit); +#define riscv_isa_extension_available(isa_bitmap, ext) \ + __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext) + +static __always_inline bool +riscv_has_extension_likely(const unsigned long ext) +{ + compiletime_assert(ext < RISCV_ISA_EXT_MAX, + "ext must be < RISCV_ISA_EXT_MAX"); + + if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) { + asm_volatile_goto( + ALTERNATIVE("j %l[l_no]", "nop", 0, %[ext], 1) + : + : [ext] "i" (ext) + : + : l_no); + } else { + if (!__riscv_isa_extension_available(NULL, ext)) + goto l_no; + } + + return true; +l_no: + return false; +} + +static __always_inline bool +riscv_has_extension_unlikely(const unsigned long ext) +{ + compiletime_assert(ext < RISCV_ISA_EXT_MAX, + "ext must be < RISCV_ISA_EXT_MAX"); + + if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) { + asm_volatile_goto( + ALTERNATIVE("nop", "j %l[l_yes]", 0, %[ext], 1) + : + : [ext] "i" (ext) + : + : l_yes); + } else { + if (__riscv_isa_extension_available(NULL, ext)) + goto l_yes; + } + + return false; +l_yes: + return true; +} + +static __always_inline bool riscv_cpu_has_extension_likely(int cpu, const unsigned long ext) +{ + if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE) && riscv_has_extension_likely(ext)) + return true; + + return __riscv_isa_extension_available(hart_isa[cpu].isa, ext); +} + +static __always_inline bool riscv_cpu_has_extension_unlikely(int cpu, const unsigned long ext) +{ + if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE) && riscv_has_extension_unlikely(ext)) + return true; + + return __riscv_isa_extension_available(hart_isa[cpu].isa, ext); +} + #endif diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index 31774bcdf1c6..141b7109c25c 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -8,9 +8,6 @@ #ifndef _ASM_RISCV_HWCAP_H #define _ASM_RISCV_HWCAP_H -#include <asm/alternative-macros.h> -#include <asm/errno.h> -#include <linux/bits.h> #include <uapi/asm/hwcap.h> #define RISCV_ISA_EXT_a ('a' - 'a') @@ -67,92 +64,4 @@ #define RISCV_ISA_EXT_SxAIA RISCV_ISA_EXT_SSAIA #endif -#ifndef __ASSEMBLY__ - -#include <linux/jump_label.h> -#include <asm/cpufeature.h> - -unsigned long riscv_get_elf_hwcap(void); - -struct riscv_isa_ext_data { - const unsigned int id; - const char *name; - const char *property; -}; - -extern const struct riscv_isa_ext_data riscv_isa_ext[]; -extern const size_t riscv_isa_ext_count; -extern bool riscv_isa_fallback; - -unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap); - -#define riscv_isa_extension_mask(ext) BIT_MASK(RISCV_ISA_EXT_##ext) - -bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit); -#define riscv_isa_extension_available(isa_bitmap, ext) \ - __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext) - -static __always_inline bool -riscv_has_extension_likely(const unsigned long ext) -{ - compiletime_assert(ext < RISCV_ISA_EXT_MAX, - "ext must be < RISCV_ISA_EXT_MAX"); - - if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) { - asm_volatile_goto( - ALTERNATIVE("j %l[l_no]", "nop", 0, %[ext], 1) - : - : [ext] "i" (ext) - : - : l_no); - } else { - if (!__riscv_isa_extension_available(NULL, ext)) - goto l_no; - } - - return true; -l_no: - return false; -} - -static __always_inline bool -riscv_has_extension_unlikely(const unsigned long ext) -{ - compiletime_assert(ext < RISCV_ISA_EXT_MAX, - "ext must be < RISCV_ISA_EXT_MAX"); - - if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) { - asm_volatile_goto( - ALTERNATIVE("nop", "j %l[l_yes]", 0, %[ext], 1) - : - : [ext] "i" (ext) - : - : l_yes); - } else { - if (__riscv_isa_extension_available(NULL, ext)) - goto l_yes; - } - - return false; -l_yes: - return true; -} - -static __always_inline bool riscv_cpu_has_extension_likely(int cpu, const unsigned long ext) -{ - if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE) && riscv_has_extension_likely(ext)) - return true; - - return __riscv_isa_extension_available(hart_isa[cpu].isa, ext); -} - -static __always_inline bool riscv_cpu_has_extension_unlikely(int cpu, const unsigned long ext) -{ - if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE) && riscv_has_extension_unlikely(ext)) - return true; - - return __riscv_isa_extension_available(hart_isa[cpu].isa, ext); -} -#endif - #endif /* _ASM_RISCV_HWCAP_H */ diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index b2ba3f79cfe9..e05b5dc1f0cb 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -291,6 +291,7 @@ static inline pte_t pud_pte(pud_t pud) } #ifdef CONFIG_RISCV_ISA_SVNAPOT +#include <asm/cpufeature.h> static __always_inline bool has_svnapot(void) { diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h index a727be723c56..f90d8e42f3c7 100644 --- a/arch/riscv/include/asm/switch_to.h +++ b/arch/riscv/include/asm/switch_to.h @@ -9,7 +9,7 @@ #include <linux/jump_label.h> #include <linux/sched/task_stack.h> #include <asm/vector.h> -#include <asm/hwcap.h> +#include <asm/cpufeature.h> #include <asm/processor.h> #include <asm/ptrace.h> #include <asm/csr.h> diff --git a/arch/riscv/include/asm/vector.h b/arch/riscv/include/asm/vector.h index c5ee07b3df07..87aaef656257 100644 --- a/arch/riscv/include/asm/vector.h +++ b/arch/riscv/include/asm/vector.h @@ -15,7 +15,7 @@ #include <linux/sched.h> #include <linux/sched/task_stack.h> #include <asm/ptrace.h> -#include <asm/hwcap.h> +#include <asm/cpufeature.h> #include <asm/csr.h> #include <asm/asm.h>
Now hwcap.h and cpufeature.h are mutually including each other, and most of the variable/API declarations in hwcap.h are implemented in cpufeature.c, so, it's better to move them into cpufeature.h and leave only macros for ISA extension logical IDs in hwcap.h. BTW, the riscv_isa_extension_mask macro is not used now, so this patch removes it. Signed-off-by: Xiao Wang <xiao.w.wang@intel.com> --- arch/riscv/include/asm/cpufeature.h | 83 ++++++++++++++++++++++++++ arch/riscv/include/asm/hwcap.h | 91 ----------------------------- arch/riscv/include/asm/pgtable.h | 1 + arch/riscv/include/asm/switch_to.h | 2 +- arch/riscv/include/asm/vector.h | 2 +- 5 files changed, 86 insertions(+), 93 deletions(-)