diff mbox series

[v2,5/5] arm64: dts: imx8dxl-ss-ddr: change ddr_pmu0 compatible

Message ID 20231011060838.3413621-5-xu.yang_2@nxp.com
State Accepted
Commit d3e94d202ca2d05793005fca76fcf18a7b3e908d
Headers show
Series [v2,1/5] perf: fsl_imx8_ddr: Add AXI ID PORT CHANNEL filter support | expand

Commit Message

Xu Yang Oct. 11, 2023, 6:08 a.m. UTC 
i.MX8DXL's ddr pmu has port/channel filter capabilities, but it still is
compatible with "fsl,imx8-ddr-pmu". This will change the compatible.

Signed-off-by: Xu Yang <xu.yang_2@nxp.com>

---
Changes since v2:
 - fix topo
---
 arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi
index 550f513708d8..3569abb5bb9b 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi
@@ -4,6 +4,6 @@ 
  */
 
 &ddr_pmu0 {
-	compatible = "fsl,imx8-ddr-pmu";
+	compatible = "fsl,imx8dxl-ddr-pmu", "fsl,imx8-ddr-pmu";
 	interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 };