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[11/14] ARM: uniphier: fix CONFIG_SYS_CACHELINE_SIZE when outer cache is on

Message ID 1470812929-21178-12-git-send-email-yamada.masahiro@socionext.com
State Accepted
Commit 8fca073271706f3d856c6554c2b5400ac9c83c10
Headers show

Commit Message

Masahiro Yamada Aug. 10, 2016, 7:08 a.m. UTC 
The UniPhier outer cache (L2 cache on ARMv7 SoCs) has 128 byte line
length and its tags are also managed per 128 byte line.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

---

 include/configs/uniphier.h | 4 ++++
 1 file changed, 4 insertions(+)

-- 
1.9.1

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Patch

diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 2606e53..9ee125f 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -25,7 +25,11 @@ 
 /* #define CONFIG_SYS_ICACHE_OFF */
 /* #define CONFIG_SYS_DCACHE_OFF */
 
+#ifdef CONFIG_CACHE_UNIPHIER
+#define CONFIG_SYS_CACHELINE_SIZE	128
+#else
 #define CONFIG_SYS_CACHELINE_SIZE	32
+#endif
 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO