diff mbox series

[13/30] crypto: stm32 - remove unnecessary alignmask for ahashes

Message ID 20231022081100.123613-14-ebiggers@kernel.org
State New
Headers show
Series crypto: reduce ahash API overhead | expand

Commit Message

Eric Biggers Oct. 22, 2023, 8:10 a.m. UTC 
From: Eric Biggers <ebiggers@google.com>

The crypto API's support for alignmasks for ahash algorithms is nearly
useless, as its only effect is to cause the API to align the key and
result buffers.  The drivers that happen to be specifying an alignmask
for ahash rarely actually need it.  When they do, it's easily fixable,
especially considering that these buffers cannot be used for DMA.

In preparation for removing alignmask support from ahash, this patch
makes the stm32 driver no longer use it.  This driver didn't actually
rely on it; it only writes to the result buffer in stm32_hash_finish(),
simply using memcpy().  And stm32_hash_setkey() does not assume any
alignment for the key buffer.

Signed-off-by: Eric Biggers <ebiggers@google.com>
---
 drivers/crypto/stm32/stm32-hash.c | 20 --------------------
 1 file changed, 20 deletions(-)
diff mbox series

Patch

diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c
index 2b2382d4332c5..34e0d7e381a8c 100644
--- a/drivers/crypto/stm32/stm32-hash.c
+++ b/drivers/crypto/stm32/stm32-hash.c
@@ -1276,21 +1276,20 @@  static struct ahash_engine_alg algs_md5[] = {
 			.digestsize = MD5_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "md5",
 				.cra_driver_name = "stm32-md5",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = MD5_HMAC_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 	{
@@ -1306,21 +1305,20 @@  static struct ahash_engine_alg algs_md5[] = {
 			.digestsize = MD5_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "hmac(md5)",
 				.cra_driver_name = "stm32-hmac-md5",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = MD5_HMAC_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_hmac_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	}
 };
@@ -1338,21 +1336,20 @@  static struct ahash_engine_alg algs_sha1[] = {
 			.digestsize = SHA1_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "sha1",
 				.cra_driver_name = "stm32-sha1",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA1_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 	{
@@ -1368,21 +1365,20 @@  static struct ahash_engine_alg algs_sha1[] = {
 			.digestsize = SHA1_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "hmac(sha1)",
 				.cra_driver_name = "stm32-hmac-sha1",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA1_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_hmac_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 };
@@ -1400,21 +1396,20 @@  static struct ahash_engine_alg algs_sha224[] = {
 			.digestsize = SHA224_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "sha224",
 				.cra_driver_name = "stm32-sha224",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA224_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 	{
@@ -1430,21 +1425,20 @@  static struct ahash_engine_alg algs_sha224[] = {
 			.digestsize = SHA224_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "hmac(sha224)",
 				.cra_driver_name = "stm32-hmac-sha224",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA224_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_hmac_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 };
@@ -1462,21 +1456,20 @@  static struct ahash_engine_alg algs_sha256[] = {
 			.digestsize = SHA256_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "sha256",
 				.cra_driver_name = "stm32-sha256",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA256_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 	{
@@ -1492,21 +1485,20 @@  static struct ahash_engine_alg algs_sha256[] = {
 			.digestsize = SHA256_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "hmac(sha256)",
 				.cra_driver_name = "stm32-hmac-sha256",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA256_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_hmac_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 };
@@ -1524,21 +1516,20 @@  static struct ahash_engine_alg algs_sha384_sha512[] = {
 			.digestsize = SHA384_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "sha384",
 				.cra_driver_name = "stm32-sha384",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA384_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 	{
@@ -1554,21 +1545,20 @@  static struct ahash_engine_alg algs_sha384_sha512[] = {
 			.digestsize = SHA384_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "hmac(sha384)",
 				.cra_driver_name = "stm32-hmac-sha384",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA384_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_hmac_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 	{
@@ -1583,21 +1573,20 @@  static struct ahash_engine_alg algs_sha384_sha512[] = {
 			.digestsize = SHA512_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "sha512",
 				.cra_driver_name = "stm32-sha512",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA512_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 	{
@@ -1613,21 +1602,20 @@  static struct ahash_engine_alg algs_sha384_sha512[] = {
 			.digestsize = SHA512_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "hmac(sha512)",
 				.cra_driver_name = "stm32-hmac-sha512",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA512_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_hmac_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 };
@@ -1645,21 +1633,20 @@  static struct ahash_engine_alg algs_sha3[] = {
 			.digestsize = SHA3_224_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "sha3-224",
 				.cra_driver_name = "stm32-sha3-224",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA3_224_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_sha3_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 	{
@@ -1675,21 +1662,20 @@  static struct ahash_engine_alg algs_sha3[] = {
 			.digestsize = SHA3_224_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "hmac(sha3-224)",
 				.cra_driver_name = "stm32-hmac-sha3-224",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA3_224_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_sha3_hmac_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 	{
@@ -1704,21 +1690,20 @@  static struct ahash_engine_alg algs_sha3[] = {
 			.digestsize = SHA3_256_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "sha3-256",
 				.cra_driver_name = "stm32-sha3-256",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA3_256_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_sha3_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 	{
@@ -1734,21 +1719,20 @@  static struct ahash_engine_alg algs_sha3[] = {
 			.digestsize = SHA3_256_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "hmac(sha3-256)",
 				.cra_driver_name = "stm32-hmac-sha3-256",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA3_256_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_sha3_hmac_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 	{
@@ -1763,21 +1747,20 @@  static struct ahash_engine_alg algs_sha3[] = {
 			.digestsize = SHA3_384_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "sha3-384",
 				.cra_driver_name = "stm32-sha3-384",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA3_384_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_sha3_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 	{
@@ -1793,21 +1776,20 @@  static struct ahash_engine_alg algs_sha3[] = {
 			.digestsize = SHA3_384_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "hmac(sha3-384)",
 				.cra_driver_name = "stm32-hmac-sha3-384",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA3_384_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_sha3_hmac_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 	{
@@ -1822,21 +1804,20 @@  static struct ahash_engine_alg algs_sha3[] = {
 			.digestsize = SHA3_512_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "sha3-512",
 				.cra_driver_name = "stm32-sha3-512",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA3_512_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_sha3_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	},
 	{
@@ -1852,21 +1833,20 @@  static struct ahash_engine_alg algs_sha3[] = {
 			.digestsize = SHA3_512_DIGEST_SIZE,
 			.statesize = sizeof(struct stm32_hash_state),
 			.base = {
 				.cra_name = "hmac(sha3-512)",
 				.cra_driver_name = "stm32-hmac-sha3-512",
 				.cra_priority = 200,
 				.cra_flags = CRYPTO_ALG_ASYNC |
 					CRYPTO_ALG_KERN_DRIVER_ONLY,
 				.cra_blocksize = SHA3_512_BLOCK_SIZE,
 				.cra_ctxsize = sizeof(struct stm32_hash_ctx),
-				.cra_alignmask = 3,
 				.cra_init = stm32_hash_cra_sha3_hmac_init,
 				.cra_exit = stm32_hash_cra_exit,
 				.cra_module = THIS_MODULE,
 			}
 		},
 		.op = {
 			.do_one_request = stm32_hash_one_request,
 		},
 	}
 };