Message ID | 20231024-b4-qcom-clk-v2-1-6572bc2be690@linaro.org |
---|---|
State | Superseded |
Headers | show |
Series | arm: mach-snapdragon: Qualcomm clock driver cleanup | expand |
On 10/30/23 18:23, Caleb Connolly wrote: > Clock drivers don't belong here, move them to the right place and > declutter mach-snapdragon a bit. > > To de-couple these drivers from specific "target" platforms, add > additional config options to enable each clock driver gated behind a > common CLK_QCOM option and enable them by default for the respective > targets. This will make future work easier as we move towards a generic > Qualcomm target. > > Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> > --- > arch/arm/mach-snapdragon/Kconfig | 4 ++ > arch/arm/mach-snapdragon/Makefile | 5 --- > drivers/clk/Kconfig | 1 + > drivers/clk/Makefile | 1 + > drivers/clk/qcom/Kconfig | 44 ++++++++++++++++++++++ > drivers/clk/qcom/Makefile | 9 +++++ > .../clk/qcom}/clock-apq8016.c | 2 +- > .../clk/qcom}/clock-apq8096.c | 3 +- > .../clk/qcom/clock-qcom.c | 2 +- > .../clk/qcom/clock-qcom.h | 0 > .../clk/qcom}/clock-qcs404.c | 2 +- > .../clk/qcom}/clock-sdm845.c | 2 +- > 12 files changed, 65 insertions(+), 10 deletions(-) Please update MAINTAINERS as well. --Sean
On Tue, 31 Oct 2023 at 03:54, Caleb Connolly <caleb.connolly@linaro.org> wrote: > > Clock drivers don't belong here, move them to the right place and > declutter mach-snapdragon a bit. > > To de-couple these drivers from specific "target" platforms, add > additional config options to enable each clock driver gated behind a > common CLK_QCOM option and enable them by default for the respective > targets. This will make future work easier as we move towards a generic > Qualcomm target. > > Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> > --- > arch/arm/mach-snapdragon/Kconfig | 4 ++ > arch/arm/mach-snapdragon/Makefile | 5 --- > drivers/clk/Kconfig | 1 + > drivers/clk/Makefile | 1 + > drivers/clk/qcom/Kconfig | 44 ++++++++++++++++++++++ > drivers/clk/qcom/Makefile | 9 +++++ > .../clk/qcom}/clock-apq8016.c | 2 +- > .../clk/qcom}/clock-apq8096.c | 3 +- > .../clk/qcom/clock-qcom.c | 2 +- > .../clk/qcom/clock-qcom.h | 0 > .../clk/qcom}/clock-qcs404.c | 2 +- > .../clk/qcom}/clock-sdm845.c | 2 +- > 12 files changed, 65 insertions(+), 10 deletions(-) > I would also like to see maintainers update, FWIW: Reviewed-by: Sumit Garg <sumit.garg@linaro.org> -Sumit > diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig > index 0e073045be54..eaf75abf4bd5 100644 > --- a/arch/arm/mach-snapdragon/Kconfig > +++ b/arch/arm/mach-snapdragon/Kconfig > @@ -16,6 +16,7 @@ config SDM845 > bool "Qualcomm Snapdragon 845 SoC" > default n > select LINUX_KERNEL_IMAGE_HEADER > + imply CLK_QCOM_SDM845 > > config LNX_KRNL_IMG_TEXT_OFFSET_BASE > default 0x80000000 > @@ -27,6 +28,7 @@ config TARGET_DRAGONBOARD410C > bool "96Boards Dragonboard 410C" > select BOARD_LATE_INIT > select ENABLE_ARM_SOC_BOOT0_HOOK > + imply CLK_QCOM_APQ8016 > help > Support for 96Boards Dragonboard 410C. This board complies with > 96Board Open Platform Specifications. Features: > @@ -40,6 +42,7 @@ config TARGET_DRAGONBOARD410C > > config TARGET_DRAGONBOARD820C > bool "96Boards Dragonboard 820C" > + imply CLK_QCOM_APQ8096 > help > Support for 96Boards Dragonboard 820C. This board complies with > 96Board Open Platform Specifications. Features: > @@ -73,6 +76,7 @@ config TARGET_STARQLTECHN > config TARGET_QCS404EVB > bool "Qualcomm Technologies, Inc. QCS404 EVB" > select LINUX_KERNEL_IMAGE_HEADER > + imply CLK_QCOM_QCS404 > help > Support for Qualcomm Technologies, Inc. QCS404 evaluation board. > Features: > diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile > index cbaaf23f6b56..497ee35cf7d3 100644 > --- a/arch/arm/mach-snapdragon/Makefile > +++ b/arch/arm/mach-snapdragon/Makefile > @@ -2,20 +2,15 @@ > # > # (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com> > > -obj-$(CONFIG_SDM845) += clock-sdm845.o > obj-$(CONFIG_SDM845) += sysmap-sdm845.o > obj-$(CONFIG_SDM845) += init_sdm845.o > -obj-$(CONFIG_TARGET_DRAGONBOARD820C) += clock-apq8096.o > obj-$(CONFIG_TARGET_DRAGONBOARD820C) += sysmap-apq8096.o > -obj-$(CONFIG_TARGET_DRAGONBOARD410C) += clock-apq8016.o > obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o > obj-y += misc.o > -obj-y += clock-snapdragon.o > obj-y += dram.o > obj-y += pinctrl-snapdragon.o > obj-y += pinctrl-apq8016.o > obj-y += pinctrl-apq8096.o > obj-y += pinctrl-qcs404.o > obj-y += pinctrl-sdm845.o > -obj-$(CONFIG_TARGET_QCS404EVB) += clock-qcs404.o > obj-$(CONFIG_TARGET_QCS404EVB) += sysmap-qcs404.o > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig > index bfd23a990469..017dd260a544 100644 > --- a/drivers/clk/Kconfig > +++ b/drivers/clk/Kconfig > @@ -254,6 +254,7 @@ source "drivers/clk/meson/Kconfig" > source "drivers/clk/microchip/Kconfig" > source "drivers/clk/mvebu/Kconfig" > source "drivers/clk/owl/Kconfig" > +source "drivers/clk/qcom/Kconfig" > source "drivers/clk/renesas/Kconfig" > source "drivers/clk/sunxi/Kconfig" > source "drivers/clk/sifive/Kconfig" > diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile > index 26bf429acbc0..dd974742b6c8 100644 > --- a/drivers/clk/Makefile > +++ b/drivers/clk/Makefile > @@ -40,6 +40,7 @@ obj-$(CONFIG_CLK_MPFS) += microchip/ > obj-$(CONFIG_CLK_MVEBU) += mvebu/ > obj-$(CONFIG_CLK_OCTEON) += clk_octeon.o > obj-$(CONFIG_CLK_OWL) += owl/ > +obj-$(CONFIG_CLK_QCOM) += qcom/ > obj-$(CONFIG_CLK_RENESAS) += renesas/ > obj-$(CONFIG_$(SPL_TPL_)CLK_SCMI) += clk_scmi.o > obj-$(CONFIG_CLK_SIFIVE) += sifive/ > diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig > new file mode 100644 > index 000000000000..a884f077d9b9 > --- /dev/null > +++ b/drivers/clk/qcom/Kconfig > @@ -0,0 +1,44 @@ > +if ARCH_SNAPDRAGON || ARCH_IPQ40XX > + > +config CLK_QCOM > + bool > + depends on CLK && DM_RESET > + def_bool n > + > +menu "Qualcomm clock drivers" > + > +config CLK_QCOM_APQ8016 > + bool "Qualcomm APQ8016 GCC" > + select CLK_QCOM > + help > + Say Y here to enable support for the Global Clock Controller > + on the Snapdragon APQ8016 SoC. This driver supports the clocks > + and resets exposed by the GCC hardware block. > + > +config CLK_QCOM_APQ8096 > + bool "Qualcomm APQ8096 GCC" > + select CLK_QCOM > + help > + Say Y here to enable support for the Global Clock Controller > + on the Snapdragon APQ8096 SoC. This driver supports the clocks > + and resets exposed by the GCC hardware block. > + > +config CLK_QCOM_QCS404 > + bool "Qualcomm QCS404 GCC" > + select CLK_QCOM > + help > + Say Y here to enable support for the Global Clock Controller > + on the Snapdragon QCS404 SoC. This driver supports the clocks > + and resets exposed by the GCC hardware block. > + > +config CLK_QCOM_SDM845 > + bool "Qualcomm SDM845 GCC" > + select CLK_QCOM > + help > + Say Y here to enable support for the Global Clock Controller > + on the Snapdragon 845 SoC. This driver supports the clocks > + and resets exposed by the GCC hardware block. > + > +endmenu > + > +endif > diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile > new file mode 100644 > index 000000000000..44d55583596d > --- /dev/null > +++ b/drivers/clk/qcom/Makefile > @@ -0,0 +1,9 @@ > +# SPDX-License-Identifier: GPL-2.0+ > +# > +# (C) Copyright 2023 Linaro > + > +obj-y += clock-qcom.o > +obj-$(CONFIG_CLK_QCOM_SDM845) += clock-sdm845.o > +obj-$(CONFIG_CLK_QCOM_APQ8016) += clock-apq8016.o > +obj-$(CONFIG_CLK_QCOM_APQ8096) += clock-apq8096.o > +obj-$(CONFIG_CLK_QCOM_QCS404) += clock-qcs404.o > diff --git a/arch/arm/mach-snapdragon/clock-apq8016.c b/drivers/clk/qcom/clock-apq8016.c > similarity index 98% > rename from arch/arm/mach-snapdragon/clock-apq8016.c > rename to drivers/clk/qcom/clock-apq8016.c > index 23a37a1714dc..90f2a93d9ed5 100644 > --- a/arch/arm/mach-snapdragon/clock-apq8016.c > +++ b/drivers/clk/qcom/clock-apq8016.c > @@ -13,7 +13,7 @@ > #include <errno.h> > #include <asm/io.h> > #include <linux/bitops.h> > -#include "clock-snapdragon.h" > +#include "clock-qcom.h" > > /* GPLL0 clock control registers */ > #define GPLL0_STATUS_ACTIVE BIT(17) > diff --git a/arch/arm/mach-snapdragon/clock-apq8096.c b/drivers/clk/qcom/clock-apq8096.c > similarity index 98% > rename from arch/arm/mach-snapdragon/clock-apq8096.c > rename to drivers/clk/qcom/clock-apq8096.c > index 66184596d562..d5388c69aefe 100644 > --- a/arch/arm/mach-snapdragon/clock-apq8096.c > +++ b/drivers/clk/qcom/clock-apq8096.c > @@ -13,7 +13,8 @@ > #include <errno.h> > #include <asm/io.h> > #include <linux/bitops.h> > -#include "clock-snapdragon.h" > + > +#include "clock-qcom.h" > > /* GPLL0 clock control registers */ > #define GPLL0_STATUS_ACTIVE BIT(30) > diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.c b/drivers/clk/qcom/clock-qcom.c > similarity index 99% > rename from arch/arm/mach-snapdragon/clock-snapdragon.c > rename to drivers/clk/qcom/clock-qcom.c > index 0ac45dce9a92..5667abeb89a4 100644 > --- a/arch/arm/mach-snapdragon/clock-snapdragon.c > +++ b/drivers/clk/qcom/clock-qcom.c > @@ -13,7 +13,7 @@ > #include <errno.h> > #include <asm/io.h> > #include <linux/bitops.h> > -#include "clock-snapdragon.h" > +#include "clock-qcom.h" > > /* CBCR register fields */ > #define CBCR_BRANCH_ENABLE_BIT BIT(0) > diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.h b/drivers/clk/qcom/clock-qcom.h > similarity index 100% > rename from arch/arm/mach-snapdragon/clock-snapdragon.h > rename to drivers/clk/qcom/clock-qcom.h > diff --git a/arch/arm/mach-snapdragon/clock-qcs404.c b/drivers/clk/qcom/clock-qcs404.c > similarity index 99% > rename from arch/arm/mach-snapdragon/clock-qcs404.c > rename to drivers/clk/qcom/clock-qcs404.c > index 3357b54c30c0..80218af73ef6 100644 > --- a/arch/arm/mach-snapdragon/clock-qcs404.c > +++ b/drivers/clk/qcom/clock-qcs404.c > @@ -11,7 +11,7 @@ > #include <errno.h> > #include <asm/io.h> > #include <linux/bitops.h> > -#include "clock-snapdragon.h" > +#include "clock-qcom.h" > > #include <dt-bindings/clock/qcom,gcc-qcs404.h> > > diff --git a/arch/arm/mach-snapdragon/clock-sdm845.c b/drivers/clk/qcom/clock-sdm845.c > similarity index 98% > rename from arch/arm/mach-snapdragon/clock-sdm845.c > rename to drivers/clk/qcom/clock-sdm845.c > index d6df0365afca..95a057b82986 100644 > --- a/arch/arm/mach-snapdragon/clock-sdm845.c > +++ b/drivers/clk/qcom/clock-sdm845.c > @@ -15,7 +15,7 @@ > #include <asm/io.h> > #include <linux/bitops.h> > #include <dt-bindings/clock/qcom,gcc-sdm845.h> > -#include "clock-snapdragon.h" > +#include "clock-qcom.h" > > #define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } > > > -- > 2.42.0 >
diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index 0e073045be54..eaf75abf4bd5 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -16,6 +16,7 @@ config SDM845 bool "Qualcomm Snapdragon 845 SoC" default n select LINUX_KERNEL_IMAGE_HEADER + imply CLK_QCOM_SDM845 config LNX_KRNL_IMG_TEXT_OFFSET_BASE default 0x80000000 @@ -27,6 +28,7 @@ config TARGET_DRAGONBOARD410C bool "96Boards Dragonboard 410C" select BOARD_LATE_INIT select ENABLE_ARM_SOC_BOOT0_HOOK + imply CLK_QCOM_APQ8016 help Support for 96Boards Dragonboard 410C. This board complies with 96Board Open Platform Specifications. Features: @@ -40,6 +42,7 @@ config TARGET_DRAGONBOARD410C config TARGET_DRAGONBOARD820C bool "96Boards Dragonboard 820C" + imply CLK_QCOM_APQ8096 help Support for 96Boards Dragonboard 820C. This board complies with 96Board Open Platform Specifications. Features: @@ -73,6 +76,7 @@ config TARGET_STARQLTECHN config TARGET_QCS404EVB bool "Qualcomm Technologies, Inc. QCS404 EVB" select LINUX_KERNEL_IMAGE_HEADER + imply CLK_QCOM_QCS404 help Support for Qualcomm Technologies, Inc. QCS404 evaluation board. Features: diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile index cbaaf23f6b56..497ee35cf7d3 100644 --- a/arch/arm/mach-snapdragon/Makefile +++ b/arch/arm/mach-snapdragon/Makefile @@ -2,20 +2,15 @@ # # (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com> -obj-$(CONFIG_SDM845) += clock-sdm845.o obj-$(CONFIG_SDM845) += sysmap-sdm845.o obj-$(CONFIG_SDM845) += init_sdm845.o -obj-$(CONFIG_TARGET_DRAGONBOARD820C) += clock-apq8096.o obj-$(CONFIG_TARGET_DRAGONBOARD820C) += sysmap-apq8096.o -obj-$(CONFIG_TARGET_DRAGONBOARD410C) += clock-apq8016.o obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o obj-y += misc.o -obj-y += clock-snapdragon.o obj-y += dram.o obj-y += pinctrl-snapdragon.o obj-y += pinctrl-apq8016.o obj-y += pinctrl-apq8096.o obj-y += pinctrl-qcs404.o obj-y += pinctrl-sdm845.o -obj-$(CONFIG_TARGET_QCS404EVB) += clock-qcs404.o obj-$(CONFIG_TARGET_QCS404EVB) += sysmap-qcs404.o diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index bfd23a990469..017dd260a544 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -254,6 +254,7 @@ source "drivers/clk/meson/Kconfig" source "drivers/clk/microchip/Kconfig" source "drivers/clk/mvebu/Kconfig" source "drivers/clk/owl/Kconfig" +source "drivers/clk/qcom/Kconfig" source "drivers/clk/renesas/Kconfig" source "drivers/clk/sunxi/Kconfig" source "drivers/clk/sifive/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 26bf429acbc0..dd974742b6c8 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -40,6 +40,7 @@ obj-$(CONFIG_CLK_MPFS) += microchip/ obj-$(CONFIG_CLK_MVEBU) += mvebu/ obj-$(CONFIG_CLK_OCTEON) += clk_octeon.o obj-$(CONFIG_CLK_OWL) += owl/ +obj-$(CONFIG_CLK_QCOM) += qcom/ obj-$(CONFIG_CLK_RENESAS) += renesas/ obj-$(CONFIG_$(SPL_TPL_)CLK_SCMI) += clk_scmi.o obj-$(CONFIG_CLK_SIFIVE) += sifive/ diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig new file mode 100644 index 000000000000..a884f077d9b9 --- /dev/null +++ b/drivers/clk/qcom/Kconfig @@ -0,0 +1,44 @@ +if ARCH_SNAPDRAGON || ARCH_IPQ40XX + +config CLK_QCOM + bool + depends on CLK && DM_RESET + def_bool n + +menu "Qualcomm clock drivers" + +config CLK_QCOM_APQ8016 + bool "Qualcomm APQ8016 GCC" + select CLK_QCOM + help + Say Y here to enable support for the Global Clock Controller + on the Snapdragon APQ8016 SoC. This driver supports the clocks + and resets exposed by the GCC hardware block. + +config CLK_QCOM_APQ8096 + bool "Qualcomm APQ8096 GCC" + select CLK_QCOM + help + Say Y here to enable support for the Global Clock Controller + on the Snapdragon APQ8096 SoC. This driver supports the clocks + and resets exposed by the GCC hardware block. + +config CLK_QCOM_QCS404 + bool "Qualcomm QCS404 GCC" + select CLK_QCOM + help + Say Y here to enable support for the Global Clock Controller + on the Snapdragon QCS404 SoC. This driver supports the clocks + and resets exposed by the GCC hardware block. + +config CLK_QCOM_SDM845 + bool "Qualcomm SDM845 GCC" + select CLK_QCOM + help + Say Y here to enable support for the Global Clock Controller + on the Snapdragon 845 SoC. This driver supports the clocks + and resets exposed by the GCC hardware block. + +endmenu + +endif diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile new file mode 100644 index 000000000000..44d55583596d --- /dev/null +++ b/drivers/clk/qcom/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2023 Linaro + +obj-y += clock-qcom.o +obj-$(CONFIG_CLK_QCOM_SDM845) += clock-sdm845.o +obj-$(CONFIG_CLK_QCOM_APQ8016) += clock-apq8016.o +obj-$(CONFIG_CLK_QCOM_APQ8096) += clock-apq8096.o +obj-$(CONFIG_CLK_QCOM_QCS404) += clock-qcs404.o diff --git a/arch/arm/mach-snapdragon/clock-apq8016.c b/drivers/clk/qcom/clock-apq8016.c similarity index 98% rename from arch/arm/mach-snapdragon/clock-apq8016.c rename to drivers/clk/qcom/clock-apq8016.c index 23a37a1714dc..90f2a93d9ed5 100644 --- a/arch/arm/mach-snapdragon/clock-apq8016.c +++ b/drivers/clk/qcom/clock-apq8016.c @@ -13,7 +13,7 @@ #include <errno.h> #include <asm/io.h> #include <linux/bitops.h> -#include "clock-snapdragon.h" +#include "clock-qcom.h" /* GPLL0 clock control registers */ #define GPLL0_STATUS_ACTIVE BIT(17) diff --git a/arch/arm/mach-snapdragon/clock-apq8096.c b/drivers/clk/qcom/clock-apq8096.c similarity index 98% rename from arch/arm/mach-snapdragon/clock-apq8096.c rename to drivers/clk/qcom/clock-apq8096.c index 66184596d562..d5388c69aefe 100644 --- a/arch/arm/mach-snapdragon/clock-apq8096.c +++ b/drivers/clk/qcom/clock-apq8096.c @@ -13,7 +13,8 @@ #include <errno.h> #include <asm/io.h> #include <linux/bitops.h> -#include "clock-snapdragon.h" + +#include "clock-qcom.h" /* GPLL0 clock control registers */ #define GPLL0_STATUS_ACTIVE BIT(30) diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.c b/drivers/clk/qcom/clock-qcom.c similarity index 99% rename from arch/arm/mach-snapdragon/clock-snapdragon.c rename to drivers/clk/qcom/clock-qcom.c index 0ac45dce9a92..5667abeb89a4 100644 --- a/arch/arm/mach-snapdragon/clock-snapdragon.c +++ b/drivers/clk/qcom/clock-qcom.c @@ -13,7 +13,7 @@ #include <errno.h> #include <asm/io.h> #include <linux/bitops.h> -#include "clock-snapdragon.h" +#include "clock-qcom.h" /* CBCR register fields */ #define CBCR_BRANCH_ENABLE_BIT BIT(0) diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.h b/drivers/clk/qcom/clock-qcom.h similarity index 100% rename from arch/arm/mach-snapdragon/clock-snapdragon.h rename to drivers/clk/qcom/clock-qcom.h diff --git a/arch/arm/mach-snapdragon/clock-qcs404.c b/drivers/clk/qcom/clock-qcs404.c similarity index 99% rename from arch/arm/mach-snapdragon/clock-qcs404.c rename to drivers/clk/qcom/clock-qcs404.c index 3357b54c30c0..80218af73ef6 100644 --- a/arch/arm/mach-snapdragon/clock-qcs404.c +++ b/drivers/clk/qcom/clock-qcs404.c @@ -11,7 +11,7 @@ #include <errno.h> #include <asm/io.h> #include <linux/bitops.h> -#include "clock-snapdragon.h" +#include "clock-qcom.h" #include <dt-bindings/clock/qcom,gcc-qcs404.h> diff --git a/arch/arm/mach-snapdragon/clock-sdm845.c b/drivers/clk/qcom/clock-sdm845.c similarity index 98% rename from arch/arm/mach-snapdragon/clock-sdm845.c rename to drivers/clk/qcom/clock-sdm845.c index d6df0365afca..95a057b82986 100644 --- a/arch/arm/mach-snapdragon/clock-sdm845.c +++ b/drivers/clk/qcom/clock-sdm845.c @@ -15,7 +15,7 @@ #include <asm/io.h> #include <linux/bitops.h> #include <dt-bindings/clock/qcom,gcc-sdm845.h> -#include "clock-snapdragon.h" +#include "clock-qcom.h" #define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }
Clock drivers don't belong here, move them to the right place and declutter mach-snapdragon a bit. To de-couple these drivers from specific "target" platforms, add additional config options to enable each clock driver gated behind a common CLK_QCOM option and enable them by default for the respective targets. This will make future work easier as we move towards a generic Qualcomm target. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> --- arch/arm/mach-snapdragon/Kconfig | 4 ++ arch/arm/mach-snapdragon/Makefile | 5 --- drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/qcom/Kconfig | 44 ++++++++++++++++++++++ drivers/clk/qcom/Makefile | 9 +++++ .../clk/qcom}/clock-apq8016.c | 2 +- .../clk/qcom}/clock-apq8096.c | 3 +- .../clk/qcom/clock-qcom.c | 2 +- .../clk/qcom/clock-qcom.h | 0 .../clk/qcom}/clock-qcs404.c | 2 +- .../clk/qcom}/clock-sdm845.c | 2 +- 12 files changed, 65 insertions(+), 10 deletions(-)