| Message ID | 20231208105155.36097-3-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Accepted |
| Commit | a711253d5f706dfc018a4a193ef401b7e8cf1d93 |
| Headers | show |
| Series | [v3,1/4] dt-bindings: PCI: qcom: adjust iommu-map for different SoC | expand |
On 08/12/2023 12:09, Dmitry Baryshkov wrote: > On Fri, 8 Dec 2023 at 12:52, Krzysztof Kozlowski > <krzysztof.kozlowski@linaro.org> wrote: >> >> PCI node in Qualcomm SM8150 should have exactly 8 clocks, including the >> ref clock. >> >> Suggested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> >> --- >> >> Please take the patch via PCI tree. >> >> Changes in v3: >> 1. New patch: Split from sc8180x change. >> 2. Add refclk as explained here: >> https://lore.kernel.org/all/20231121065440.GB3315@thinkpad/ >> --- >> .../devicetree/bindings/pci/qcom,pcie.yaml | 26 +++++++++++++++++++ >> 1 file changed, 26 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml >> index 5214bf7a9045..a93ab3b54066 100644 >> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml >> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml >> @@ -559,6 +559,32 @@ allOf: >> contains: >> enum: >> - qcom,pcie-sm8150 >> + then: >> + properties: >> + clocks: >> + minItems: 8 >> + maxItems: 8 >> + clock-names: >> + items: >> + - const: pipe # PIPE clock >> + - const: aux # Auxiliary clock >> + - const: cfg # Configuration clock >> + - const: bus_master # Master AXI clock >> + - const: bus_slave # Slave AXI clock >> + - const: slave_q2a # Slave Q2A clock >> + - const: tbu # PCIe TBU clock >> + - const: ref # REFERENCE clock > > Can we change the order of the tbu and ref clocks and fold this into > the sc810x case? I prefer not, because this is an ABI-concern and we are supposed to keep things stable. Best regards, Krzysztof
On Fri, 08 Dec 2023 11:51:54 +0100, Krzysztof Kozlowski wrote: > PCI node in Qualcomm SM8150 should have exactly 8 clocks, including the > ref clock. > > Suggested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- > > Please take the patch via PCI tree. > > Changes in v3: > 1. New patch: Split from sc8180x change. > 2. Add refclk as explained here: > https://lore.kernel.org/all/20231121065440.GB3315@thinkpad/ > --- > .../devicetree/bindings/pci/qcom,pcie.yaml | 26 +++++++++++++++++++ > 1 file changed, 26 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 5214bf7a9045..a93ab3b54066 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -559,6 +559,32 @@ allOf: contains: enum: - qcom,pcie-sm8150 + then: + properties: + clocks: + minItems: 8 + maxItems: 8 + clock-names: + items: + - const: pipe # PIPE clock + - const: aux # Auxiliary clock + - const: cfg # Configuration clock + - const: bus_master # Master AXI clock + - const: bus_slave # Slave AXI clock + - const: slave_q2a # Slave Q2A clock + - const: tbu # PCIe TBU clock + - const: ref # REFERENCE clock + resets: + maxItems: 1 + reset-names: + items: + - const: pci # PCIe core reset + + - if: + properties: + compatible: + contains: + enum: - qcom,pcie-sm8250 then: oneOf:
PCI node in Qualcomm SM8150 should have exactly 8 clocks, including the ref clock. Suggested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Please take the patch via PCI tree. Changes in v3: 1. New patch: Split from sc8180x change. 2. Add refclk as explained here: https://lore.kernel.org/all/20231121065440.GB3315@thinkpad/ --- .../devicetree/bindings/pci/qcom,pcie.yaml | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+)