Message ID | 20231213134052.2818879-1-neal.frager@amd.com |
---|---|
State | New |
Headers | show |
Series | [v2,1/1] arm64: zynqmp: Add output-enable pins to SOMs | expand |
On 12/13/23 14:40, Neal Frager wrote: > Now that the zynqmp pinctrl driver supports the tri-state registers, make > sure that the pins requiring output-enable are configured appropriately for > SOMs. > > Without it, all tristate setting for MIOs, which are not related to SOM > itself, are using default configuration which is not correct setting. > It means SDs, USBs, ethernet, etc. are not working properly. > > In past it was fixed through calling tristate configuration via bootcmd: > usb_init=mw 0xFF180208 2020 > kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio@ff0a000038 && \ > gpio toggle gpio@ff0a000038 > > Signed-off-by: Neal Frager <neal.frager@amd.com> > --- > V1->V2: > - remove output-enable from gem1 conf-rx pins > --- > arch/arm/dts/zynqmp-sck-kd-g-revA.dts | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dts b/arch/arm/dts/zynqmp-sck-kd-g-revA.dts > index 56f3128528..12865392a3 100644 > --- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dts > +++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dts This file never gets to upstream because it was merged as dtso. That's why I think you are not using the latest tree for this patch. Can you please rebase and send again? Thanks, Michal
Hi Michal, > Now that the zynqmp pinctrl driver supports the tri-state registers, make > sure that the pins requiring output-enable are configured appropriately for > SOMs. > > Without it, all tristate setting for MIOs, which are not related to SOM > itself, are using default configuration which is not correct setting. > It means SDs, USBs, ethernet, etc. are not working properly. > > In past it was fixed through calling tristate configuration via bootcmd: > usb_init=mw 0xFF180208 2020 > kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio@ff0a000038 && \ > gpio toggle gpio@ff0a000038 > > Signed-off-by: Neal Frager <neal.frager@amd.com> > --- > V1->V2: > - remove output-enable from gem1 conf-rx pins > --- > arch/arm/dts/zynqmp-sck-kd-g-revA.dts | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dts b/arch/arm/dts/zynqmp-sck-kd-g-revA.dts > index 56f3128528..12865392a3 100644 > --- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dts > +++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dts > This file never gets to upstream because it was merged as dtso. > That's why I think you are not using the latest tree for this patch. > Can you please rebase and send again? Thank you for pointing this out. You are correct as I was actually working from the https://github.com/Xilinx/u-boot-xlnx/ master branch which, as you know, is still based on u-boot 2023.01. Looking at the upstream zynqmp-sck-kd-g-revA.dtso, the output-enable defines are already included, so this patch is unnecessary. Please disregard this patch. I will mark it as handled elsewhere. Best regards, Neal Frager AMD
diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dts b/arch/arm/dts/zynqmp-sck-kd-g-revA.dts index 56f3128528..12865392a3 100644 --- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dts @@ -175,6 +175,7 @@ conf-tx { pins = "MIO36"; bias-disable; + output-enable; }; mux { @@ -226,6 +227,7 @@ conf-bootstrap { pins = "MIO44", "MIO49"; bias-disable; + output-enable; low-power-disable; }; @@ -233,6 +235,7 @@ pins = "MIO38", "MIO39", "MIO40", "MIO41", "MIO42", "MIO43"; bias-disable; + output-enable; low-power-enable; }; @@ -241,6 +244,7 @@ slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; bias-disable; + output-enable; }; mux-mdio { @@ -271,6 +275,7 @@ pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = <SLEW_RATE_SLOW>; }; @@ -298,6 +303,7 @@ pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = <SLEW_RATE_SLOW>; };
Now that the zynqmp pinctrl driver supports the tri-state registers, make sure that the pins requiring output-enable are configured appropriately for SOMs. Without it, all tristate setting for MIOs, which are not related to SOM itself, are using default configuration which is not correct setting. It means SDs, USBs, ethernet, etc. are not working properly. In past it was fixed through calling tristate configuration via bootcmd: usb_init=mw 0xFF180208 2020 kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio@ff0a000038 && \ gpio toggle gpio@ff0a000038 Signed-off-by: Neal Frager <neal.frager@amd.com> --- V1->V2: - remove output-enable from gem1 conf-rx pins --- arch/arm/dts/zynqmp-sck-kd-g-revA.dts | 6 ++++++ 1 file changed, 6 insertions(+)