@@ -855,6 +855,8 @@ void vcpu_fp_guest_to_user(struct kvm_vcpu *vcpu);
} else { \
__vcpu_vq = vcpu_sme_max_vq(vcpu); \
__size_ret = ZA_SIG_REGS_SIZE(__vcpu_vq); \
+ if (system_supports_sme2()) \
+ __size_ret += ZT_SIG_REG_SIZE; \
} \
\
__size_ret; \
@@ -371,6 +371,8 @@ struct kvm_arm_counter_offset {
(((n) & (KVM_ARM64_SME_MAX_ZAHREG - 1)) << 5) | \
((i) & (KVM_ARM64_SVE_MAX_SLICES - 1)))
+#define KVM_REG_ARM64_SME_ZTREG_SIZE (512 / 8)
+
/* Vector lengths pseudo-register: */
#define KVM_REG_ARM64_SME_VLS (KVM_REG_ARM64 | KVM_REG_ARM64_SME | \
KVM_REG_SIZE_U512 | 0xffff)
@@ -587,7 +587,6 @@ static int sme_reg_to_region(struct vec_state_reg_region *region,
const u64 zah_id_min = KVM_REG_ARM64_SME_ZAHREG(0, 0);
const u64 zah_id_max = KVM_REG_ARM64_SME_ZAHREG(za_h_max - 1,
SVE_NUM_SLICES - 1);
-
unsigned int reg_num;
unsigned int reqoffset, reqlen; /* User-requested offset and length */
@@ -598,14 +597,24 @@ static int sme_reg_to_region(struct vec_state_reg_region *region,
reg_num = (reg->id & SVE_REG_ID_MASK) >> SVE_REG_ID_SHIFT;
if (reg->id >= zah_id_min && reg->id <= zah_id_max) {
- /* ZA is exposed as SVE vectors ZA.H[n] */
if (!vcpu_has_sme(vcpu) || (reg->id & SVE_REG_SLICE_MASK) > 0)
return -ENOENT;
+ /* ZA is exposed as SVE vectors ZA.H[n] */
reqoffset = ZA_SIG_ZAV_OFFSET(vq, reg_num) -
ZA_SIG_REGS_OFFSET;
reqlen = KVM_SVE_ZREG_SIZE;
maxlen = SVE_SIG_ZREG_SIZE(vq);
+ } if (reg->id == KVM_REG_ARM64_SME_ZT_BASE) {
+ /* ZA is exposed as SVE vectors ZA.H[n] */
+ if (!vcpu_has_sme2(vcpu) ||
+ (reg->id & SVE_REG_SLICE_MASK) > 0 ||
+ reg_num > 0)
+ return -ENOENT;
+
+ /* ZT0 is stored after ZA */
+ reqlen = KVM_REG_ARM64_SME_ZTREG_SIZE;
+ maxlen = KVM_REG_ARM64_SME_ZTREG_SIZE;
} else {
return -EINVAL;
}
ZT0 is a single register with a refreshingly fixed size 512 bit register which is like ZA accessible only when PSTATE.ZA is set. Add support for it to the userspace API, as with ZA we allow the regster to be read or written regardless of the state of PSTATE.ZA in order to simplify userspace usage. The value will be reset to 0 whenever PSTATE.ZA changes from 0 to 1, userspace can read stale values but these are not observable by the guest without manipulation of PSTATE.ZA by userspace. While there is currently only one ZT register the naming as ZT0 and the instruction encoding clearly leave room for future extensions adding more ZT registers. This encoding can readily support such an extension if one is introduced. Signed-off-by: Mark Brown <broonie@kernel.org> --- arch/arm64/include/asm/kvm_host.h | 2 ++ arch/arm64/include/uapi/asm/kvm.h | 2 ++ arch/arm64/kvm/guest.c | 13 +++++++++++-- 3 files changed, 15 insertions(+), 2 deletions(-)