| Message ID | 20230717-topic-branch_aon_cleanup-v4-11-32c293ded915@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v4,01/12] clk: qcom: branch: Add a helper for setting the enable bit | expand |
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 160e098f1075..30b140e1cec0 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -807,6 +807,7 @@ gcc: clock-controller@1400000 { reg = <0x0 0x01400000 0x0 0x1f0000>; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep_clk>; clock-names = "bi_tcxo", "sleep_clk"; + power-domains = <&rpmpd SM6115_VDDCX>; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>;
The GCC block is mainly powered by VDD_CX. Describe that. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 1 + 1 file changed, 1 insertion(+)