| Message ID | 20240104024244.12163-5-Wenhua.Lin@unisoc.com |
|---|---|
| State | New |
| Headers | show |
| Series | gpio: eic-sprd: Modification of UNISOC Platform EIC Driver | expand |
On Thu, 4 Jan 2024 at 10:43, Wenhua Lin <Wenhua.Lin@unisoc.com> wrote: > > In order to solve the problem of insufficient eic, > it supports 8 banks of eic controller, each bank contains 8 eic. > > Signed-off-by: Wenhua Lin <Wenhua.Lin@unisoc.com> > --- > drivers/gpio/gpio-eic-sprd.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c > index 1ca3c444957c..715c7d581d7f 100644 > --- a/drivers/gpio/gpio-eic-sprd.c > +++ b/drivers/gpio/gpio-eic-sprd.c > @@ -52,10 +52,10 @@ > #define SPRD_EIC_SYNC_DATA 0x1c > > /* > - * The digital-chip EIC controller can support maximum 3 banks, and each bank > + * The digital-chip EIC controller can support maximum 8 banks, and each bank > * contains 8 EICs. > */ > -#define SPRD_EIC_MAX_BANK 3 > +#define SPRD_EIC_MAX_BANK 8 This change seems not backward compatible. Also this is not flexible to support more SoCs which may have more than 8 banks (if we have this kind of SoCs in the future). I would suggest adding a new item like 'bank_nums' into sprd_eic_variant_data. Thanks, Chunyan > #define SPRD_EIC_PER_BANK_NR 8 > #define SPRD_EIC_DATA_MASK GENMASK(7, 0) > #define SPRD_EIC_BIT(x) ((x) & (SPRD_EIC_PER_BANK_NR - 1)) > @@ -627,9 +627,9 @@ static int sprd_eic_probe(struct platform_device *pdev) > > for (i = 0; i < SPRD_EIC_MAX_BANK; i++) { > /* > - * We can have maximum 3 banks EICs, and each EIC has > + * We can have maximum 8 banks EICs, and each EIC has > * its own base address. But some platform maybe only > - * have one bank EIC, thus base[1] and base[2] can be > + * have one bank EIC, thus base[1] to base[7] can be > * optional. > */ > res = platform_get_resource(pdev, IORESOURCE_MEM, i); > -- > 2.17.1 >
On Mon, Jan 8, 2024 at 4:56 PM Chunyan Zhang <zhang.lyra@gmail.com> wrote: > > On Thu, 4 Jan 2024 at 10:43, Wenhua Lin <Wenhua.Lin@unisoc.com> wrote: > > > > In order to solve the problem of insufficient eic, > > it supports 8 banks of eic controller, each bank contains 8 eic. > > > > Signed-off-by: Wenhua Lin <Wenhua.Lin@unisoc.com> > > --- > > drivers/gpio/gpio-eic-sprd.c | 8 ++++---- > > 1 file changed, 4 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c > > index 1ca3c444957c..715c7d581d7f 100644 > > --- a/drivers/gpio/gpio-eic-sprd.c > > +++ b/drivers/gpio/gpio-eic-sprd.c > > @@ -52,10 +52,10 @@ > > #define SPRD_EIC_SYNC_DATA 0x1c > > > > /* > > - * The digital-chip EIC controller can support maximum 3 banks, and each bank > > + * The digital-chip EIC controller can support maximum 8 banks, and each bank > > * contains 8 EICs. > > */ > > -#define SPRD_EIC_MAX_BANK 3 > > +#define SPRD_EIC_MAX_BANK 8 > > This change seems not backward compatible. > > Also this is not flexible to support more SoCs which may have more > than 8 banks (if we have this kind of SoCs in the future). > > I would suggest adding a new item like 'bank_nums' into sprd_eic_variant_data. > > Thanks, > Chunyan > We will refer to this plan for modifications. > > #define SPRD_EIC_PER_BANK_NR 8 > > #define SPRD_EIC_DATA_MASK GENMASK(7, 0) > > #define SPRD_EIC_BIT(x) ((x) & (SPRD_EIC_PER_BANK_NR - 1)) > > @@ -627,9 +627,9 @@ static int sprd_eic_probe(struct platform_device *pdev) > > > > for (i = 0; i < SPRD_EIC_MAX_BANK; i++) { > > /* > > - * We can have maximum 3 banks EICs, and each EIC has > > + * We can have maximum 8 banks EICs, and each EIC has > > * its own base address. But some platform maybe only > > - * have one bank EIC, thus base[1] and base[2] can be > > + * have one bank EIC, thus base[1] to base[7] can be > > * optional. > > */ > > res = platform_get_resource(pdev, IORESOURCE_MEM, i); > > -- > > 2.17.1 > >
diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c index 1ca3c444957c..715c7d581d7f 100644 --- a/drivers/gpio/gpio-eic-sprd.c +++ b/drivers/gpio/gpio-eic-sprd.c @@ -52,10 +52,10 @@ #define SPRD_EIC_SYNC_DATA 0x1c /* - * The digital-chip EIC controller can support maximum 3 banks, and each bank + * The digital-chip EIC controller can support maximum 8 banks, and each bank * contains 8 EICs. */ -#define SPRD_EIC_MAX_BANK 3 +#define SPRD_EIC_MAX_BANK 8 #define SPRD_EIC_PER_BANK_NR 8 #define SPRD_EIC_DATA_MASK GENMASK(7, 0) #define SPRD_EIC_BIT(x) ((x) & (SPRD_EIC_PER_BANK_NR - 1)) @@ -627,9 +627,9 @@ static int sprd_eic_probe(struct platform_device *pdev) for (i = 0; i < SPRD_EIC_MAX_BANK; i++) { /* - * We can have maximum 3 banks EICs, and each EIC has + * We can have maximum 8 banks EICs, and each EIC has * its own base address. But some platform maybe only - * have one bank EIC, thus base[1] and base[2] can be + * have one bank EIC, thus base[1] to base[7] can be * optional. */ res = platform_get_resource(pdev, IORESOURCE_MEM, i);
In order to solve the problem of insufficient eic, it supports 8 banks of eic controller, each bank contains 8 eic. Signed-off-by: Wenhua Lin <Wenhua.Lin@unisoc.com> --- drivers/gpio/gpio-eic-sprd.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)