Message ID | 1474305396-18809-1-git-send-email-ard.biesheuvel@linaro.org |
---|---|
State | Accepted |
Commit | 331135f3107c33f9537ba2de8922104e3c6322be |
Headers | show |
On 19 September 2016 at 19:45, Jeremy Linton <jeremy.linton@arm.com> wrote: > Hi, > > On 09/19/2016 12:16 PM, Ard Biesheuvel wrote: >> >> Change the PCIe bus range in the DSDT from [0x0 .. 0xf] to [0x00 .. 0x7f], >> which aligns it with the DT descripton. Also fix the I/O window: its range >> should be listed without taking the translation into account. > > > > Looks good. > > FWIW: > > Reviewed-by: Jeremy Linton <jeremy.linton@arm.com> > Thanks, Jeremy. I already pushed these patches, though, so I won't be able to add the tag anymore. Cheers, Ard.
diff --git a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl b/Platforms/AMD/Styx/AcpiTables/Dsdt.asl index 1f0a96fb83ee..554cb8738529 100644 --- a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl +++ b/Platforms/AMD/Styx/AcpiTables/Dsdt.asl @@ -554,9 +554,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum - 0x000F, // Range Maximum + 0x007F, // Range Maximum 0x0000, // Translation Offset - 0x0010, // Length + 0x0080, // Length ) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x00000000, // Granularity @@ -637,10 +637,14 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) ) DWordIo (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity - 0xEFFF0000, // Range Minimum - 0xEFFFFFFF, // Range Maximum + 0x00000000, // Range Minimum + 0x0000FFFF, // Range Maximum 0xEFFF0000, // Translation Address - 0x00010000 // Length + 0x00010000, // Length + , + , + , + TypeTranslation ) }) Return (RBUF) /* \_SB_.PCI0._CRS.RBUF */