Message ID | 20240125-dispcc-sm8550-sm8650-drop-disp-ahb-clk-v1-5-0f8d96156156@linaro.org |
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Thu, 25 Jan 2024 01:28:08 -0800 (PST) Received: from [127.0.1.1] ([79.115.23.25]) by smtp.gmail.com with ESMTPSA id f19-20020a056402005300b00554af5ec62asm17356391edu.8.2024.01.25.01.28.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Jan 2024 01:28:08 -0800 (PST) From: Abel Vesa <abel.vesa@linaro.org> Date: Thu, 25 Jan 2024 11:27:49 +0200 Subject: [PATCH 5/5] clk: qcom: dispcc-sm8650: Drop the Disp AHB DT provided clock Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: <linux-arm-msm.vger.kernel.org> List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240125-dispcc-sm8550-sm8650-drop-disp-ahb-clk-v1-5-0f8d96156156@linaro.org> References: <20240125-dispcc-sm8550-sm8650-drop-disp-ahb-clk-v1-0-0f8d96156156@linaro.org> In-Reply-To: <20240125-dispcc-sm8550-sm8650-drop-disp-ahb-clk-v1-0-0f8d96156156@linaro.org> To: Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Neil Armstrong <neil.armstrong@linaro.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa <abel.vesa@linaro.org> X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; 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Series |
clk: qcom: sm8[56]50: Drop the Disp AHB clock from Display Clock Controller
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diff --git a/drivers/clk/qcom/dispcc-sm8650.c b/drivers/clk/qcom/dispcc-sm8650.c index f3b1d9d16bae..382ebc1866b9 100644 --- a/drivers/clk/qcom/dispcc-sm8650.c +++ b/drivers/clk/qcom/dispcc-sm8650.c @@ -29,7 +29,6 @@ enum { DT_BI_TCXO, DT_BI_TCXO_AO, - DT_AHB_CLK, DT_SLEEP_CLK, DT_DSI0_PHY_PLL_OUT_BYTECLK,
The GCC doesn't even register the Disp AHB clock. It enables it on probe though. So drop it from the list of DT provided clocks as well. Fixes: 9e939f008338 ("clk: qcom: add the SM8650 Display Clock Controller driver") Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- drivers/clk/qcom/dispcc-sm8650.c | 1 - 1 file changed, 1 deletion(-)