| Message ID | 1474469532-19204-1-git-send-email-julien.grall@arm.com |
|---|---|
| State | New |
| Headers | show |
diff --git a/xen/include/asm-arm/arm64/page.h b/xen/include/asm-arm/arm64/page.h index 79ef7bd..23d7781 100644 --- a/xen/include/asm-arm/arm64/page.h +++ b/xen/include/asm-arm/arm64/page.h @@ -33,6 +33,8 @@ static inline void write_pte(lpae_t *p, lpae_t pte) static inline void invalidate_icache(void) { asm volatile ("ic ialluis"); + dsb(ish); /* Ensure completion of the flush I-cache */ + isb(); } /*
The invalidation of the instructions cache requires barriers to ensure the completion of the invalidation before continuing (see B2.3.4 in ARM DDI 0487A.j). This was overlooked in commit fb9d877 "xen/arm64: Add an helper to invalidate all instruction caches". Signed-off-by: Julien Grall <julien.grall@arm.com> --- xen/include/asm-arm/arm64/page.h | 2 ++ 1 file changed, 2 insertions(+)