| Message ID | 20240204214052.5639-1-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
On Sun, 4 Feb 2024 at 21:41, Richard Henderson <richard.henderson@linaro.org> wrote: > > The following changes since commit 39a6e4f87e7b75a45b08d6dc8b8b7c2954c87440: > > Merge tag 'pull-qapi-2024-02-03' of https://repo.or.cz/qemu/armbru into staging (2024-02-03 13:31:58 +0000) > > are available in the Git repository at: > > https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20240205 > > for you to fetch changes up to 867db6870a6f5d4e0915822d6a84e665bec1f22e: > > tcg/tci: Support TCG_COND_TST{EQ,NE} (2024-02-03 23:53:49 +0000) > > ---------------------------------------------------------------- > tcg: Introduce TCG_COND_TST{EQ,NE} > target/alpha: Use TCG_COND_TST{EQ,NE} > target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_cond > target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc > target/s390x: Use TCG_COND_TSTNE for CC_OP_{TM,ICM} > target/s390x: Improve general case of disas_jcc > > ---------------------------------------------------------------- The s390 linux-user guest on s390 host dumped core on the sha1 test binary: TEST sha1 on s390x qemu: uncaught target signal 11 (Segmentation fault) - core dumped timeout: the monitored command dumped core Segmentation fault make[1]: *** [Makefile:178: run-sha1] Error 139 https://gitlab.com/qemu-project/qemu/-/jobs/6095771567 thanks -- PMM
The following changes since commit 39a6e4f87e7b75a45b08d6dc8b8b7c2954c87440: Merge tag 'pull-qapi-2024-02-03' of https://repo.or.cz/qemu/armbru into staging (2024-02-03 13:31:58 +0000) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20240205 for you to fetch changes up to 867db6870a6f5d4e0915822d6a84e665bec1f22e: tcg/tci: Support TCG_COND_TST{EQ,NE} (2024-02-03 23:53:49 +0000) ---------------------------------------------------------------- tcg: Introduce TCG_COND_TST{EQ,NE} target/alpha: Use TCG_COND_TST{EQ,NE} target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_cond target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc target/s390x: Use TCG_COND_TSTNE for CC_OP_{TM,ICM} target/s390x: Improve general case of disas_jcc ---------------------------------------------------------------- Paolo Bonzini (1): tcg/i386: Use TEST r,r to test 8/16/32 bits Philippe Mathieu-Daudé (1): tcg/aarch64: Massage tcg_out_brcond() Richard Henderson (37): tcg: Introduce TCG_COND_TST{EQ,NE} tcg: Introduce TCG_TARGET_HAS_tst tcg/optimize: Split out arg_is_const_val tcg/optimize: Split out do_constant_folding_cond1 tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2 tcg/optimize: Handle TCG_COND_TST{EQ,NE} tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported target/alpha: Pass immediate value to gen_bcond_internal() target/alpha: Use TCG_COND_TST{EQ,NE} for BLB{C,S} target/alpha: Use TCG_COND_TST{EQ,NE} for CMOVLB{C,S} target/alpha: Use TCG_COND_TSTNE for gen_fold_mzero target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_cond target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc target/s390x: Use TCG_COND_TSTNE for CC_OP_{TM,ICM} target/s390x: Improve general case of disas_jcc tcg: Add TCGConst argument to tcg_target_const_match tcg/aarch64: Support TCG_COND_TST{EQ,NE} tcg/aarch64: Generate TBZ, TBNZ tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX tcg/arm: Split out tcg_out_cmp() tcg/arm: Support TCG_COND_TST{EQ,NE} tcg/i386: Pass x86 condition codes to tcg_out_cmov tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp tcg/i386: Support TCG_COND_TST{EQ,NE} tcg/i386: Improve TSTNE/TESTEQ vs powers of two tcg/sparc64: Hoist read of tcg_cond_to_rcond tcg/sparc64: Pass TCGCond to tcg_out_cmp tcg/sparc64: Support TCG_COND_TST{EQ,NE} tcg/ppc: Sink tcg_to_bc usage into tcg_out_bc tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel tcg/ppc: Tidy up tcg_target_const_match tcg/ppc: Add TCG_CT_CONST_CMP tcg/ppc: Support TCG_COND_TST{EQ,NE} tcg/s390x: Split constraint A into J+U tcg/s390x: Add TCG_CT_CONST_CMP tcg/s390x: Support TCG_COND_TST{EQ,NE} tcg/tci: Support TCG_COND_TST{EQ,NE} include/tcg/tcg-cond.h | 74 ++++-- tcg/aarch64/tcg-target-con-set.h | 5 +- tcg/aarch64/tcg-target-con-str.h | 1 + tcg/aarch64/tcg-target.h | 2 + tcg/arm/tcg-target.h | 2 + tcg/i386/tcg-target-con-set.h | 6 +- tcg/i386/tcg-target-con-str.h | 1 + tcg/i386/tcg-target.h | 2 + tcg/loongarch64/tcg-target.h | 2 + tcg/mips/tcg-target.h | 2 + tcg/ppc/tcg-target-con-set.h | 5 +- tcg/ppc/tcg-target-con-str.h | 1 + tcg/ppc/tcg-target.h | 2 + tcg/riscv/tcg-target.h | 2 + tcg/s390x/tcg-target-con-set.h | 8 +- tcg/s390x/tcg-target-con-str.h | 3 +- tcg/s390x/tcg-target.h | 2 + tcg/sparc64/tcg-target.h | 2 + tcg/tcg-internal.h | 2 + tcg/tci/tcg-target.h | 2 + target/alpha/translate.c | 94 ++++---- target/m68k/translate.c | 74 +++--- target/s390x/tcg/translate.c | 100 +++------ target/sparc/translate.c | 4 +- tcg/optimize.c | 474 ++++++++++++++++++++++++++++++--------- tcg/tcg.c | 40 +++- tcg/tci.c | 14 ++ docs/devel/tcg-ops.rst | 2 + tcg/aarch64/tcg-target.c.inc | 166 +++++++++++--- tcg/arm/tcg-target.c.inc | 62 +++-- tcg/i386/tcg-target.c.inc | 201 ++++++++++++----- tcg/loongarch64/tcg-target.c.inc | 3 +- tcg/mips/tcg-target.c.inc | 3 +- tcg/ppc/tcg-target.c.inc | 294 ++++++++++++++++++------ tcg/riscv/tcg-target.c.inc | 3 +- tcg/s390x/tcg-target.c.inc | 246 +++++++++++++------- tcg/sparc64/tcg-target.c.inc | 65 ++++-- tcg/tci/tcg-target.c.inc | 3 +- 38 files changed, 1379 insertions(+), 595 deletions(-)