@@ -89,7 +89,7 @@ const struct clk_ops clk_mux_ops = {
EXPORT_SYMBOL_GPL(clk_mux_ops);
struct clk *clk_register_mux(struct device *dev, const char *name,
- char **parent_names, u8 num_parents, unsigned long flags,
+ const char **parent_names, u8 num_parents, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_mux_flags, spinlock_t *lock)
{
@@ -1328,7 +1328,7 @@ out:
*/
struct clk *clk_register(struct device *dev, const char *name,
const struct clk_ops *ops, struct clk_hw *hw,
- char **parent_names, u8 num_parents, unsigned long flags)
+ const char **parent_names, u8 num_parents, unsigned long flags)
{
struct clk *clk;
@@ -30,7 +30,7 @@ struct clk {
const struct clk_ops *ops;
struct clk_hw *hw;
struct clk *parent;
- char **parent_names;
+ const char **parent_names;
struct clk **parents;
u8 num_parents;
unsigned long rate;
@@ -176,7 +176,7 @@ struct clk_gate {
u8 bit_idx;
u8 flags;
spinlock_t *lock;
- char *parent[1];
+ const char *parent[1];
};
#define CLK_GATE_SET_TO_DISABLE BIT(0)
@@ -214,7 +214,7 @@ struct clk_divider {
u8 width;
u8 flags;
spinlock_t *lock;
- char *parent[1];
+ const char *parent[1];
};
#define CLK_DIVIDER_ONE_BASED BIT(0)
@@ -257,7 +257,7 @@ struct clk_mux {
extern const struct clk_ops clk_mux_ops;
struct clk *clk_register_mux(struct device *dev, const char *name,
- char **parent_names, u8 num_parents, unsigned long flags,
+ const char **parent_names, u8 num_parents, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_mux_flags, spinlock_t *lock);
@@ -278,7 +278,7 @@ struct clk *clk_register_mux(struct device *dev, const char *name,
*/
struct clk *clk_register(struct device *dev, const char *name,
const struct clk_ops *ops, struct clk_hw *hw,
- char **parent_names, u8 num_parents, unsigned long flags);
+ const char **parent_names, u8 num_parents, unsigned long flags);
/* helper functions */
const char *__clk_get_name(struct clk *clk);