| Message ID | 20240417-drm-msm-initial-dualpipe-dsc-fixes-v1-5-78ae3ee9a697@somainline.org |
|---|---|
| State | New |
| Headers | show |
| Series | drm/msm: Initial fixes for DUALPIPE (+DSC) topology | expand |
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index d9e7dbf0499c..7e849fe74801 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -428,7 +428,7 @@ static void dpu_encoder_phys_vid_enable(struct dpu_encoder_phys *phys_enc) dpu_encoder_phys_vid_setup_timing_engine(phys_enc); /* - * For single flush cases (dual-ctl or pp-split), skip setting the + * For single flush cases (dual-intf or pp-split), skip setting the * flush bit for the slave intf, since both intfs use same ctl * and HW will only flush the master. */
This comment one line down references a single, "same CTL" that controls two interfaces, so the comment should clearly describe two interfaces used with a single active CTL and not "two CTLs". Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)